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spi_master: sct mode support set line mode, transaction interval time

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support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
This commit is contained in:
wanlei
2023-03-09 15:07:21 +08:00
parent 30760a95bb
commit 1e6c61daa6
22 changed files with 398 additions and 177 deletions
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4
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@@ -851,6 +851,10 @@ config SOC_SPI_SCT_BUFFER_NUM_MAX
bool
default y
config SOC_SPI_SCT_CONF_BITLEN_MAX
hex
default 0x3FFFA
config SOC_MEMSPI_SRC_FREQ_120M
bool
default y

1
components/soc/esp32s3/include/soc/soc_caps.h
View File

@@ -336,6 +336,7 @@
#define SOC_SPI_SCT_SUPPORTED_PERIPH(PERIPH_NUM) ((PERIPH_NUM==1) ? 1 : 0) //Support Segmented-Configure-Transfer
#define SOC_SPI_SCT_REG_NUM 14
#define SOC_SPI_SCT_BUFFER_NUM_MAX (1 + SOC_SPI_SCT_REG_NUM) //1-word-bitmap + 14-word-regs
#define SOC_SPI_SCT_CONF_BITLEN_MAX 0x3FFFA //18 bits wide reg
#define SOC_MEMSPI_SRC_FREQ_120M 1
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1