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feat(interrupt): rename interrupt martix reg base

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gaoxu
2024-12-24 19:13:32 +08:00
parent 3e30d2e928
commit 1efea28c69
19 changed files with 242 additions and 242 deletions
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2
components/soc/esp32c61/include/soc/interrupt_reg.h
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@@ -15,4 +15,4 @@
#define INTERRUPT_CORE0_CPU_INT_THRESH_REG INTERRUPT_CURRENT_CORE_INT_THRESH_REG
#define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_MATRIX_BASE
#define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTMTX_BASE

2
components/soc/esp32c61/include/soc/soc.h
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@@ -24,7 +24,7 @@
#define REG_SPI_MEM_BASE(i) (DR_REG_MSPI0_BASE + (i) * 0x1000) // SPIMEM0 and SPIMEM1
#define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI on C61
#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE) // only one I2C on C61
#define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_MATRIX_BASE
#define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTMTX_BASE
//Registers Operation {{
#define ETS_UNCACHED_ADDR(addr) (addr)