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Add debug log for int enable

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This commit is contained in:
gengyuchao
2020-07-29 20:33:33 +08:00
committed by maojianxin
parent a0226f1793
commit 1f286c2ba9
2 changed files with 23 additions and 2 deletions
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10
components/esp32/crosscore_int.c
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@@ -36,6 +36,7 @@
#define REASON_YIELD BIT(0)
#define REASON_FREQ_SWITCH BIT(1)
#define REASON_GET_INT BIT(2)
static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED;
static volatile uint32_t reason[ portNUM_PROCESSORS ];
@@ -76,6 +77,10 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
* to allow DFS features without the extra latency of the ISR hook.
*/
}
if(my_reason_val & REASON_GET_INT) {
extern int _int_enable_flag;
asm volatile ("rsr %0, INTENABLE\n" :"=r"(_int_enable_flag));
}
}
//Initialize the crosscore interrupt on this core. Call this once
@@ -117,3 +122,8 @@ void IRAM_ATTR esp_crosscore_int_send_freq_switch(int core_id)
esp_crosscore_int_send(core_id, REASON_FREQ_SWITCH);
}
void IRAM_ATTR esp_crosscore_int_send_get_int(int core_id)
{
esp_crosscore_int_send(core_id, REASON_GET_INT);
}