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esp_lcd: check edma buffer alignment properly

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morris
2023-03-31 14:24:29 +08:00
parent 1e7f9c8f72
commit 1fed9badf1
3 changed files with 8 additions and 15 deletions
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9
components/esp_lcd/src/esp_lcd_panel_io_i80.c
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@@ -36,6 +36,7 @@
#include "soc/lcd_periph.h"
#include "hal/lcd_ll.h"
#include "hal/lcd_hal.h"
#include "esp_cache.h"
static const char *TAG = "lcd_panel.io.i80";
@@ -43,9 +44,6 @@ typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t;
typedef struct lcd_panel_io_i80_t lcd_panel_io_i80_t;
typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t;
// This function is located in ROM (also see esp_rom/${target}/ld/${target}.rom.ld)
extern int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size);
static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io);
@@ -471,8 +469,9 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
trans_desc->user_ctx = i80_device->user_ctx;
if (esp_ptr_external_ram(color)) {
// flush framebuffer from cache to the physical PSRAM
Cache_WriteBack_Addr((uint32_t)color, color_size);
// flush frame buffer from cache to the physical PSRAM
// note the esp_cache_msync function will check the alignment of the address and size, and error out if either of them is not matched
ESP_RETURN_ON_ERROR(esp_cache_msync((void *)color, color_size, 0), TAG, "flush cache buffer failed");
}
// send transaction to trans_queue