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esp32h2: update driver/hal/soc components to support esp32h2

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This commit is contained in:
Shu Chen
2021-06-10 10:28:23 +08:00
parent 983cca8b27
commit 205cd469e9
89 changed files with 7679 additions and 5021 deletions
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28
components/esp32h2/CMakeLists.txt
View File

@@ -1,13 +1,13 @@
idf_build_get_property(target IDF_TARGET)
idf_build_get_property(sdkconfig_header SDKCONFIG_HEADER)
if(NOT "${target}" STREQUAL "esp32c3")
if(NOT "${target}" STREQUAL "esp32h2")
return()
endif()
if(BOOTLOADER_BUILD)
# For bootloader, all we need from esp32c3 is headers
# For bootloader, all we need from esp32h2 is headers
idf_component_register(INCLUDE_DIRS include REQUIRES riscv)
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32c3.peripherals.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32h2.peripherals.ld")
else()
# Regular app build
@@ -31,32 +31,32 @@ else()
INCLUDE_DIRS "${include_dirs}"
REQUIRES "${requires}"
PRIV_REQUIRES "${priv_requires}"
REQUIRED_IDF_TARGETS esp32c3)
REQUIRED_IDF_TARGETS esp32h2)
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp32c3_out.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp32h2_out.ld")
# Process the template file through the linker script generation mechanism, and use the output for linking the
# final binary
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32c3.project.ld.in"
PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32c3.project.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32c3.peripherals.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32h2.project.ld.in"
PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32h2.project.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32h2.peripherals.ld")
target_link_libraries(${COMPONENT_LIB} PUBLIC gcc)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0")
idf_build_get_property(config_dir CONFIG_DIR)
# Preprocess esp32c3.ld linker script to include configuration, becomes esp32c3_out.ld
# Preprocess esp32h2.ld linker script to include configuration, becomes esp32h2_out.ld
set(LD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/ld)
add_custom_command(
OUTPUT esp32c3_out.ld
COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o esp32c3_out.ld -I ${config_dir} ${LD_DIR}/esp32c3.ld
MAIN_DEPENDENCY ${LD_DIR}/esp32c3.ld
OUTPUT esp32h2_out.ld
COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o esp32h2_out.ld -I ${config_dir} ${LD_DIR}/esp32h2.ld
MAIN_DEPENDENCY ${LD_DIR}/esp32h2.ld
DEPENDS ${sdkconfig_header}
COMMENT "Generating linker script..."
VERBATIM)
add_custom_target(esp32c3_linker_script DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/esp32c3_out.ld)
add_dependencies(${COMPONENT_LIB} esp32c3_linker_script)
add_custom_target(esp32h2_linker_script DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/esp32h2_out.ld)
add_dependencies(${COMPONENT_LIB} esp32h2_linker_script)
# disable stack protection in files which are involved in initialization of that feature
set_source_files_properties(

137
components/esp32h2/Kconfig
View File

@@ -1,54 +1,48 @@
menu "ESP32C3-Specific"
visible if IDF_TARGET_ESP32C3
menu "ESP32H2-Specific"
visible if IDF_TARGET_ESP32H2
choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
choice ESP32H2_DEFAULT_CPU_FREQ_MHZ
prompt "CPU frequency"
default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
default ESP32H2_DEFAULT_CPU_FREQ_64 if IDF_ENV_FPGA
default ESP32H2_DEFAULT_CPU_FREQ_96 if !IDF_ENV_FPGA
help
CPU frequency to be set on application startup.
config ESP32C3_DEFAULT_CPU_FREQ_40
bool "40 MHz"
depends on IDF_ENV_FPGA
config ESP32C3_DEFAULT_CPU_FREQ_80
bool "80 MHz"
config ESP32C3_DEFAULT_CPU_FREQ_160
bool "160 MHz"
config ESP32H2_DEFAULT_CPU_FREQ_16
bool "16 MHz"
config ESP32H2_DEFAULT_CPU_FREQ_32
bool "32 MHz"
config ESP32H2_DEFAULT_CPU_FREQ_64
bool "64 MHz"
config ESP32H2_DEFAULT_CPU_FREQ_96
bool "96 MHz"
depends on !IDF_ENV_FPGA
endchoice
config ESP32C3_DEFAULT_CPU_FREQ_MHZ
config ESP32H2_DEFAULT_CPU_FREQ_MHZ
int
default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
default 16 if ESP32H2_DEFAULT_CPU_FREQ_16
default 32 if ESP32H2_DEFAULT_CPU_FREQ_32
default 64 if ESP32H2_DEFAULT_CPU_FREQ_64
default 96 if ESP32H2_DEFAULT_CPU_FREQ_96
choice ESP32C3_REV_MIN
prompt "Minimum Supported ESP32-C3 Revision"
default ESP32C3_REV_MIN_3
choice ESP32H2_REV_MIN
prompt "Minimum Supported ESP32-H2 Revision"
default ESP32H2_REV_MIN_0
help
Minimum revision that ESP-IDF would support.
Only supporting higher chip revisions can reduce binary size.
config ESP32C3_REV_MIN_0
config ESP32H2_REV_MIN_0
bool "Rev 0"
config ESP32C3_REV_MIN_1
bool "Rev 1"
config ESP32C3_REV_MIN_2
bool "Rev 2"
config ESP32C3_REV_MIN_3
bool "Rev 3"
endchoice
config ESP32C3_REV_MIN
config ESP32H2_REV_MIN
int
default 0 if ESP32C3_REV_MIN_0
default 1 if ESP32C3_REV_MIN_1
default 2 if ESP32C3_REV_MIN_2
default 3 if ESP32C3_REV_MIN_3
default 0 if ESP32H2_REV_MIN_0
config ESP32C3_DEBUG_OCDAWARE
config ESP32H2_DEBUG_OCDAWARE
bool "Make exception and panic handlers JTAG/OCD aware"
default y
select FREERTOS_DEBUG_OCDAWARE
@@ -56,15 +50,15 @@ menu "ESP32C3-Specific"
The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
instead of panicking, have the debugger stop on the offending instruction.
config ESP32C3_DEBUG_STUBS_ENABLE
config ESP32H2_DEBUG_STUBS_ENABLE
bool "OpenOCD debug stubs"
default COMPILER_OPTIMIZATION_LEVEL_DEBUG
depends on !ESP32C3_TRAX
depends on !ESP32H2_TRAX
help
Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
e.g. GCOV data dump.
config ESP32C3_BROWNOUT_DET
config ESP32H2_BROWNOUT_DET
bool "Hardware brownout detect & reset"
default y
help
@@ -72,10 +66,10 @@ menu "ESP32C3-Specific"
a specific value. If this happens, it will reset the chip in order to prevent unintended
behaviour.
choice ESP32C3_BROWNOUT_DET_LVL_SEL
choice ESP32H2_BROWNOUT_DET_LVL_SEL
prompt "Brownout voltage level"
depends on ESP32C3_BROWNOUT_DET
default ESP32C3_BROWNOUT_DET_LVL_SEL_7
depends on ESP32H2_BROWNOUT_DET
default ESP32H2_BROWNOUT_DET_LVL_SEL_7
help
The brownout detector will reset the chip when the supply voltage is approximately
below this level. Note that there may be some variation of brownout voltage level
@@ -83,32 +77,32 @@ menu "ESP32C3-Specific"
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
#of the brownout threshold levels.
config ESP32C3_BROWNOUT_DET_LVL_SEL_7
config ESP32H2_BROWNOUT_DET_LVL_SEL_7
bool "2.51V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_6
config ESP32H2_BROWNOUT_DET_LVL_SEL_6
bool "2.64V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_5
config ESP32H2_BROWNOUT_DET_LVL_SEL_5
bool "2.76V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_4
config ESP32H2_BROWNOUT_DET_LVL_SEL_4
bool "2.92V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_3
config ESP32H2_BROWNOUT_DET_LVL_SEL_3
bool "3.10V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_2
config ESP32H2_BROWNOUT_DET_LVL_SEL_2
bool "3.27V"
endchoice
config ESP32C3_BROWNOUT_DET_LVL
config ESP32H2_BROWNOUT_DET_LVL
int
default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2
default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3
default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4
default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5
default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6
default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7
default 2 if ESP32H2_BROWNOUT_DET_LVL_SEL_2
default 3 if ESP32H2_BROWNOUT_DET_LVL_SEL_3
default 4 if ESP32H2_BROWNOUT_DET_LVL_SEL_4
default 5 if ESP32H2_BROWNOUT_DET_LVL_SEL_5
default 6 if ESP32H2_BROWNOUT_DET_LVL_SEL_6
default 7 if ESP32H2_BROWNOUT_DET_LVL_SEL_7
choice ESP32C3_TIME_SYSCALL
choice ESP32H2_TIME_SYSCALL
prompt "Timers used for gettimeofday function"
default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
default ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
help
This setting defines which hardware timers are used to
implement 'gettimeofday' and 'time' functions in C library.
@@ -128,44 +122,43 @@ menu "ESP32C3-Specific"
- When RTC is used for timekeeping, two RTC_STORE registers are
used to keep time in deep sleep mode.
config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
config ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
bool "RTC and high-resolution timer"
select ESP_TIME_FUNCS_USE_RTC_TIMER
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP32C3_TIME_SYSCALL_USE_RTC
config ESP32H2_TIME_SYSCALL_USE_RTC
bool "RTC"
select ESP_TIME_FUNCS_USE_RTC_TIMER
config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
config ESP32H2_TIME_SYSCALL_USE_SYSTIMER
bool "High-resolution timer"
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP32C3_TIME_SYSCALL_USE_NONE
config ESP32H2_TIME_SYSCALL_USE_NONE
bool "None"
select ESP_TIME_FUNCS_USE_NONE
endchoice
choice ESP32C3_RTC_CLK_SRC
choice ESP32H2_RTC_CLK_SRC
prompt "RTC clock source"
default ESP32C3_RTC_CLK_SRC_INT_RC
default ESP32H2_RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config ESP32C3_RTC_CLK_SRC_INT_RC
config ESP32H2_RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config ESP32C3_RTC_CLK_SRC_EXT_CRYS
config ESP32H2_RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config ESP32C3_RTC_CLK_SRC_EXT_OSC
config ESP32H2_RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
config ESP32C3_RTC_CLK_SRC_INT_8MD256
config ESP32H2_RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config ESP32C3_RTC_CLK_CAL_CYCLES
config ESP32H2_RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC
range 0 27000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
range 0 32766 if ESP32C3_RTC_CLK_SRC_INT_RC
default 3000 if ESP32H2_RTC_CLK_SRC_EXT_CRYS || ESP32H2_RTC_CLK_SRC_EXT_OSC || ESP32H2_RTC_CLK_SRC_INT_8MD256
default 576 if ESP32H2_RTC_CLK_SRC_INT_RC
range 0 125000
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
@@ -182,7 +175,7 @@ menu "ESP32C3-Specific"
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
config ESP32C3_NO_BLOBS
config ESP32H2_NO_BLOBS
bool "No Binary Blobs"
depends on !BT_ENABLED
default n
@@ -190,12 +183,12 @@ menu "ESP32C3-Specific"
If enabled, this disables the linking of binary libraries in the application build. Note
that after enabling this Wi-Fi/Bluetooth will not work.
config ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
config ESP32H2_LIGHTSLEEP_GPIO_RESET_WORKAROUND
bool "light sleep GPIO reset workaround"
default y
select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
help
ESP32C3 will reset at wake-up if GPIO is received a small electrostatic pulse during
ESP32H2 will reset at wake-up if GPIO is received a small electrostatic pulse during
light sleep, with specific condition
- GPIO needs to be configured as input-mode only
@@ -209,4 +202,4 @@ menu "ESP32C3-Specific"
This option provides a software workaround for this issue. Configure to isolate all
GPIO pins in sleep state.
endmenu # ESP32C3-Specific
endmenu # ESP32H2-Specific

2
components/esp32h2/Makefile.projbuild
View File

@@ -1 +1 @@
# ESP32-C3 is not supported in the GNU Make build system.
# ESP32-H2 is not supported in the GNU Make build system.

10
components/esp32h2/esp_ds.c
View File

@@ -23,7 +23,7 @@
#include "hal/ds_hal.h"
#include "hal/ds_ll.h"
#include "hal/hmac_hal.h"
#include "esp32c3/rom/digital_signature.h"
#include "esp32h2/rom/digital_signature.h"
#include "esp_timer.h"
#include "esp_ds.h"
@@ -123,7 +123,7 @@ esp_err_t esp_ds_start_sign(const void *message,
uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_DS, key_id);
if (conf_error) {
ds_disable_release();
return ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL;
return ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL;
}
ds_hal_start();
@@ -133,7 +133,7 @@ esp_err_t esp_ds_start_sign(const void *message,
while (ds_ll_busy() != 0) {
if ((esp_timer_get_time() - start_time) > SOC_DS_KEY_CHECK_MAX_WAIT_US) {
ds_disable_release();
return ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY;
return ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY;
}
}
@@ -178,11 +178,11 @@ esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
esp_err_t return_value = ESP_OK;
if (sig_check_result == DS_SIGNATURE_MD_FAIL || sig_check_result == DS_SIGNATURE_PADDING_AND_MD_FAIL) {
return_value = ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
return_value = ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
}
if (sig_check_result == DS_SIGNATURE_PADDING_FAIL) {
return_value = ESP32C3_ERR_HW_CRYPTO_DS_INVALID_PADDING;
return_value = ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING;
}
free(esp_ds_ctx);

8
components/esp32h2/esp_hmac.c
View File

@@ -14,8 +14,8 @@
#include <string.h>
#include "driver/periph_ctrl.h"
#include "esp32c3/rom/hmac.h"
#include "esp32c3/rom/ets_sys.h"
#include "esp32h2/rom/hmac.h"
#include "esp32h2/rom/ets_sys.h"
#include "esp_hmac.h"
#include "esp_crypto_lock.h"
@@ -30,13 +30,13 @@
* @note This function does not check the data length, it is the responsibility of the other functions in this
* module to make sure that \c data_len is at most SHA256_BLOCK_SZ - 1 so the padding fits in.
* Otherwise, this function has undefined behavior.
* Note however, that for the actual HMAC implementation on ESP32C3, the length also needs to be applied at the end
* Note however, that for the actual HMAC implementation on ESP32H2, the length also needs to be applied at the end
* of the block. This function alone deosn't do that.
*/
static void write_and_padd(uint8_t *block, const uint8_t *data, uint16_t data_len)
{
memcpy(block, data, data_len);
// Apply a one bit, followed by zero bits (refer to the ESP32C3 TRM).
// Apply a one bit, followed by zero bits (refer to the ESP32H2 TRM).
block[data_len] = 0x80;
bzero(block + data_len + 1, SHA256_BLOCK_SZ - data_len - 1);
}

2
components/esp32h2/include/esp32h2/memprot.h
View File

@@ -244,7 +244,7 @@ bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
/**
* @brief Gets CPU ID for currently active PMS violation interrupt
*
* @return CPU ID (CPU_PRO for ESP32C3)
* @return CPU ID (CPU_PRO for ESP32H2)
*/
int IRAM_ATTR esp_memprot_intr_get_cpuid(void);

2
components/esp32h2/include/esp32h2/rtc.h
View File

@@ -21,7 +21,7 @@ extern "C" {
#endif
/**
* @file esp32c3/rtc.h
* @file esp32h2/rtc.h
*
* This file contains declarations of rtc related functions.
*/

8
components/esp32h2/include/esp_ds.h
View File

@@ -21,12 +21,12 @@
extern "C" {
#endif
#define ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
HMAC peripheral problem */
#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
result is invalid */
#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_PADDING ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
is produced anyway and can be read*/
#define ESP_DS_IV_BIT_LEN 128

12
components/esp32h2/ld/esp32h2.ld
View File

@@ -1,5 +1,5 @@
/**
* ESP32-C3 Linker Script Memory Layout
* ESP32-H2 Linker Script Memory Layout
* This file describes the memory layout (memory blocks) by virtual memory addresses.
* This linker script is passed through the C preprocessor to include configuration options.
* Please use preprocessor features sparingly!
@@ -27,12 +27,12 @@
#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32C3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
#if CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32H2_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
#define DRAM0_0_SEG_LEN CONFIG_ESP3C3_FIXED_STATIC_RAM_SIZE
#else
#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
#endif // CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE
MEMORY
{
/**
@@ -76,12 +76,12 @@ MEMORY
rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
}
#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
#if CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE
/* static data ends at defined address */
_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
#else
_static_data_end = _bss_end;
#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
#endif // CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE
/* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000;

4
components/esp32h2/ld/esp32h2.project.ld.in
View File

@@ -52,7 +52,7 @@ SECTIONS
* named rtc_wake_stub*.c and the data marked with
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
* The memory location of the data is dependent on
* CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
* CONFIG_ESP32H2_RTCDATA_IN_FAST_MEM option.
*/
.rtc.data :
{
@@ -81,7 +81,7 @@ SECTIONS
* and will be retained during deep sleep.
* User data marked with RTC_NOINIT_ATTR will be placed
* into this section. See the file "esp_attr.h" for more information.
* The memory location of the data is dependent on CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
* The memory location of the data is dependent on CONFIG_ESP32H2_RTCDATA_IN_FAST_MEM option.
*/
.rtc_noinit (NOLOAD):
{

4
components/esp32h2/memprot.c
View File

@@ -23,9 +23,9 @@
#include "soc/periph_defs.h"
#include "esp_intr_alloc.h"
#include "hal/memprot_ll.h"
#include "esp32c3/memprot.h"
#include "esp32h2/memprot.h"
#include "riscv/interrupt.h"
#include "esp32c3/rom/ets_sys.h"
#include "esp32h2/rom/ets_sys.h"
#include "esp_log.h"
extern int _iram_text_end;

2
components/esp32h2/test/CMakeLists.txt
View File

@@ -1,4 +1,4 @@
if(IDF_TARGET STREQUAL "esp32c3")
if(IDF_TARGET STREQUAL "esp32h2")
idf_component_register(SRC_DIRS .
INCLUDE_DIRS . ${CMAKE_CURRENT_BINARY_DIR}
REQUIRES unity test_utils esp_common mbedtls

14
components/esp32h2/test/test_ds.c
View File

@@ -13,9 +13,9 @@
// limitations under the License.
#include "unity.h"
#include "esp32c3/rom/efuse.h"
#include "esp32c3/rom/digital_signature.h"
#include "esp32c3/rom/hmac.h"
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/digital_signature.h"
#include "esp32h2/rom/hmac.h"
#include <string.h>
#include "esp_ds.h"
@@ -256,7 +256,7 @@ TEST_CASE("Digital Signature wrong HMAC key purpose (FPGA only)", "[hw_crypto] [
const char *message = "test";
// HMAC fails in that case because it checks for the correct purpose
TEST_ASSERT_EQUAL(ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL, esp_ds_start_sign(message, &ds_data, HMAC_KEY0, &ctx));
TEST_ASSERT_EQUAL(ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL, esp_ds_start_sign(message, &ds_data, HMAC_KEY0, &ctx));
}
// This test uses the HMAC_KEY0 eFuse key which hasn't been burned by burn_hmac_keys().
@@ -269,7 +269,7 @@ TEST_CASE("Digital Signature Blocking wrong HMAC key purpose (FPGA only)", "[hw_
uint8_t signature_data [128 * 4];
// HMAC fails in that case because it checks for the correct purpose
TEST_ASSERT_EQUAL(ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL, esp_ds_sign(message, &ds_data, HMAC_KEY0, signature_data));
TEST_ASSERT_EQUAL(ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL, esp_ds_sign(message, &ds_data, HMAC_KEY0, signature_data));
}
TEST_CASE("Digital Signature Operation (FPGA only)", "[hw_crypto] [ds]")
@@ -356,7 +356,7 @@ TEST_CASE("Digital Signature Invalid Data (FPGA only)", "[hw_crypto] [ds]")
esp_err_t ds_r = esp_ds_start_sign(test_messages[0], &ds_data, t->hmac_key_idx + 1, &esp_ds_ctx);
TEST_ASSERT_EQUAL(ESP_OK, ds_r);
ds_r = esp_ds_finish_sign(signature, esp_ds_ctx);
TEST_ASSERT_EQUAL(ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST, ds_r);
TEST_ASSERT_EQUAL(ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST, ds_r);
TEST_ASSERT_EQUAL_HEX8_ARRAY(zero, signature, DS_MAX_BITS/8);
ds_data.iv[bit / 8] ^= 1 << (bit % 8);
@@ -372,7 +372,7 @@ TEST_CASE("Digital Signature Invalid Data (FPGA only)", "[hw_crypto] [ds]")
esp_err_t ds_r = esp_ds_start_sign(test_messages[0], &ds_data, t->hmac_key_idx + 1, &esp_ds_ctx);
TEST_ASSERT_EQUAL(ESP_OK, ds_r);
ds_r = esp_ds_finish_sign(signature, esp_ds_ctx);
TEST_ASSERT_EQUAL(ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST, ds_r);
TEST_ASSERT_EQUAL(ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST, ds_r);
TEST_ASSERT_EQUAL_HEX8_ARRAY(zero, signature, DS_MAX_BITS/8);
ds_data.c[bit / 8] ^= 1 << (bit % 8);

2
components/esp32h2/test/test_sha.c
View File

@@ -2,7 +2,7 @@
#include <stdlib.h>
#include <string.h>
#include "esp_types.h"
#include "esp32c3/clk.h"
#include "esp32h2/clk.h"
#include "esp_log.h"
#include "esp_timer.h"
#include "esp_heap_caps.h"