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Merge branch 'feat/c5mp_gpspi_support' into 'master'

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feat(spi): c5mp gpspi support

See merge request espressif/esp-idf!30960
This commit is contained in:
Wan Lei
2024-05-22 16:36:16 +08:00
parent f36d034f7f b76620374f
commit 207966d64c
17 changed files with 294 additions and 459 deletions
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297
components/hal/esp32c5/include/hal/gpspi_flash_ll.h
View File

@@ -45,17 +45,17 @@ typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
*/
static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.val = 0;
// dev->ctrl.val = 0;
// // dev->clk_gate.clk_en = 1;
// dev->clk_gate.mst_clk_active = 1;
// dev->clk_gate.mst_clk_sel = 1;
// // dev->dma_conf.val = 0;
// dev->dma_conf.slv_tx_seg_trans_clr_en = 1;
// dev->dma_conf.slv_rx_seg_trans_clr_en = 1;
// dev->dma_conf.dma_slv_seg_trans_en = 0;
abort();
dev->user.val = 0;
dev->ctrl.val = 0;
dev->clk_gate.clk_en = 1;
dev->clk_gate.mst_clk_active = 1;
dev->clk_gate.mst_clk_sel = 1;
dev->dma_conf.val = 0;
dev->dma_conf.slv_tx_seg_trans_clr_en = 1;
dev->dma_conf.slv_rx_seg_trans_clr_en = 1;
dev->dma_conf.dma_slv_seg_trans_en = 0;
}
/**
@@ -67,10 +67,7 @@ static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
*/
static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// return (dev->cmd.usr == 0);
abort();
return (bool)0;
return (dev->cmd.usr == 0);
}
/**
@@ -82,22 +79,20 @@ static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev)
*/
static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
// // If everything is word-aligned, do a faster memcpy
// memcpy(buffer, (void *)dev->data_buf, read_len);
// } else {
// // Otherwise, slow(er) path copies word by word
// int copy_len = read_len;
// for (int i = 0; i < (read_len + 3) / 4; i++) {
// int word_len = MIN(sizeof(uint32_t), copy_len);
// uint32_t word = dev->data_buf[i].buf;
// memcpy(buffer, &word, word_len);
// buffer = (void *)((intptr_t)buffer + word_len);
// copy_len -= word_len;
// }
// }
abort();
if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) {
// If everything is word-aligned, do a faster memcpy
memcpy(buffer, (void *)dev->data_buf, read_len);
} else {
// Otherwise, slow(er) path copies word by word
int copy_len = read_len;
for (int i = 0; i < (read_len + 3) / 4; i++) {
int word_len = MIN(sizeof(uint32_t), copy_len);
uint32_t word = dev->data_buf[i].buf;
memcpy(buffer, &word, word_len);
buffer = (void *)((intptr_t)buffer + word_len);
copy_len -= word_len;
}
}
}
/**
@@ -108,9 +103,7 @@ static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer,
*/
static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->data_buf[0].buf = word;
abort();
dev->data_buf[0].buf = word;
}
/**
@@ -122,18 +115,16 @@ static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
*/
static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// // Load data registers, word at a time
// int num_words = (length + 3) / 4;
// for (int i = 0; i < num_words; i++) {
// uint32_t word = 0;
// uint32_t word_len = MIN(length, sizeof(word));
// memcpy(&word, buffer, word_len);
// dev->data_buf[i].buf = word;
// length -= word_len;
// buffer = (void *)((intptr_t)buffer + word_len);
// }
abort();
// Load data registers, word at a time
int num_words = (length + 3) / 4;
for (int i = 0; i < num_words; i++) {
uint32_t word = 0;
uint32_t word_len = MIN(length, sizeof(word));
memcpy(&word, buffer, word_len);
dev->data_buf[i].buf = word;
length -= word_len;
buffer = (void *)((intptr_t)buffer + word_len);
}
}
/**
@@ -145,11 +136,9 @@ static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *bu
*/
static inline void gpspi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->cmd.update = 1;
// while (dev->cmd.update);
// dev->cmd.usr = 1;
abort();
dev->cmd.update = 1;
while (dev->cmd.update);
dev->cmd.usr = 1;
}
/**
@@ -159,9 +148,7 @@ static inline void gpspi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops)
*/
static inline void gpspi_flash_ll_set_pe_bit(spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// // Not supported on GPSPI
abort();
// Not supported on GPSPI
}
/**
@@ -171,9 +158,7 @@ static inline void gpspi_flash_ll_set_pe_bit(spi_dev_t *dev)
*/
static inline void gpspi_flash_ll_set_hold_pol(spi_dev_t *dev, uint32_t pol_val)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->ctrl.hold_pol = pol_val;
abort();
dev->ctrl.hold_pol = pol_val;
}
/**
@@ -185,10 +170,7 @@ static inline void gpspi_flash_ll_set_hold_pol(spi_dev_t *dev, uint32_t pol_val)
*/
static inline bool gpspi_flash_ll_host_idle(const spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// return dev->cmd.usr == 0;
abort();
return (bool)0;
return dev->cmd.usr == 0;
}
/**
@@ -198,15 +180,13 @@ static inline bool gpspi_flash_ll_host_idle(const spi_dev_t *dev)
*/
static inline void gpspi_flash_ll_read_phase(spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// typeof (dev->user) user = {
// .usr_mosi = 0,
// .usr_miso = 1,
// .usr_addr = 1,
// .usr_command = 1,
// };
// dev->user.val = user.val;
abort();
typeof (dev->user) user = {
.usr_mosi = 0,
.usr_miso = 1,
.usr_addr = 1,
.usr_command = 1,
};
dev->user.val = user.val;
}
/*------------------------------------------------------------------------------
* Configs
@@ -219,10 +199,8 @@ static inline void gpspi_flash_ll_read_phase(spi_dev_t *dev)
*/
static inline void gpspi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->misc.cs0_dis = (pin == 0) ? 0 : 1;
// dev->misc.cs1_dis = (pin == 1) ? 0 : 1;
abort();
dev->misc.cs0_dis = (pin == 0) ? 0 : 1;
dev->misc.cs1_dis = (pin == 1) ? 0 : 1;
}
/**
@@ -233,42 +211,43 @@ static inline void gpspi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin)
*/
static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mode_t read_mode)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// typeof (dev->ctrl) ctrl;
// ctrl.val = dev->ctrl.val;
// typeof (dev->user) user;
// user.val = dev->user.val;
// // ctrl.val &= ~(SPI_FCMD_QUAD_M | SPI_FADDR_QUAD_M | SPI_FREAD_QUAD_M | SPI_FCMD_DUAL_M | SPI_FADDR_DUAL_M | SPI_FREAD_DUAL_M);
// user.val &= ~(SPI_FWRITE_QUAD_M | SPI_FWRITE_DUAL_M);
// // switch (read_mode) {
// case SPI_FLASH_FASTRD:
// //the default option
// case SPI_FLASH_SLOWRD:
// break;
// case SPI_FLASH_QIO:
// ctrl.fread_quad = 1;
// ctrl.faddr_quad = 1;
// user.fwrite_quad = 1;
// break;
// case SPI_FLASH_QOUT:
// ctrl.fread_quad = 1;
// user.fwrite_quad = 1;
// break;
// case SPI_FLASH_DIO:
// ctrl.fread_dual = 1;
// ctrl.faddr_dual = 1;
// user.fwrite_dual = 1;
// break;
// case SPI_FLASH_DOUT:
// ctrl.fread_dual = 1;
// user.fwrite_dual = 1;
// break;
// default:
// abort();
// }
// // dev->ctrl.val = ctrl.val;
// dev->user.val = user.val;
abort();
typeof (dev->ctrl) ctrl;
ctrl.val = dev->ctrl.val;
typeof (dev->user) user;
user.val = dev->user.val;
ctrl.val &= ~(SPI_FCMD_QUAD_M | SPI_FADDR_QUAD_M | SPI_FREAD_QUAD_M | SPI_FCMD_DUAL_M | SPI_FADDR_DUAL_M | SPI_FREAD_DUAL_M);
user.val &= ~(SPI_FWRITE_QUAD_M | SPI_FWRITE_DUAL_M);
switch (read_mode) {
case SPI_FLASH_FASTRD:
//the default option
case SPI_FLASH_SLOWRD:
break;
case SPI_FLASH_QIO:
ctrl.fread_quad = 1;
ctrl.faddr_quad = 1;
user.fwrite_quad = 1;
break;
case SPI_FLASH_QOUT:
ctrl.fread_quad = 1;
user.fwrite_quad = 1;
break;
case SPI_FLASH_DIO:
ctrl.fread_dual = 1;
ctrl.faddr_dual = 1;
user.fwrite_dual = 1;
break;
case SPI_FLASH_DOUT:
ctrl.fread_dual = 1;
user.fwrite_dual = 1;
break;
default:
abort();
}
dev->ctrl.val = ctrl.val;
dev->user.val = user.val;
}
/**
@@ -279,9 +258,7 @@ static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mod
*/
static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock_reg_t *clock_val)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->clock.val = *clock_val;
abort();
dev->clock.val = *clock_val;
}
/**
@@ -292,12 +269,10 @@ static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock
*/
static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitlen)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.usr_miso = bitlen > 0;
// if (bitlen) {
// dev->ms_dlen.ms_data_bitlen = bitlen - 1;
// }
abort();
dev->user.usr_miso = bitlen > 0;
if (bitlen) {
dev->ms_dlen.ms_data_bitlen = bitlen - 1;
}
}
/**
@@ -309,12 +284,10 @@ static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitle
*/
static inline void gpspi_flash_ll_set_mosi_bitlen(spi_dev_t *dev, uint32_t bitlen)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.usr_mosi = bitlen > 0;
// if (bitlen) {
// dev->ms_dlen.ms_data_bitlen = bitlen - 1;
// }
abort();
dev->user.usr_mosi = bitlen > 0;
if (bitlen) {
dev->ms_dlen.ms_data_bitlen = bitlen - 1;
}
}
/**
@@ -326,14 +299,12 @@ static inline void gpspi_flash_ll_set_mosi_bitlen(spi_dev_t *dev, uint32_t bitle
*/
static inline void gpspi_flash_ll_set_command(spi_dev_t *dev, uint8_t command, uint32_t bitlen)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.usr_command = 1;
// typeof(dev->user2) user2 = {
// .usr_command_value = command,
// .usr_command_bitlen = (bitlen - 1),
// };
// dev->user2.val = user2.val;
abort();
dev->user.usr_command = 1;
typeof(dev->user2) user2 = {
.usr_command_value = command,
.usr_command_bitlen = (bitlen - 1),
};
dev->user2.val = user2.val;
}
/**
@@ -344,10 +315,7 @@ static inline void gpspi_flash_ll_set_command(spi_dev_t *dev, uint8_t command, u
*/
static inline int gpspi_flash_ll_get_addr_bitlen(spi_dev_t *dev)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0;
abort();
return (int)0;
return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0;
}
/**
@@ -358,10 +326,8 @@ static inline int gpspi_flash_ll_get_addr_bitlen(spi_dev_t *dev)
*/
static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitlen)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user1.usr_addr_bitlen = (bitlen - 1);
// dev->user.usr_addr = bitlen ? 1 : 0;
abort();
dev->user1.usr_addr_bitlen = (bitlen - 1);
dev->user.usr_addr = bitlen ? 1 : 0;
}
/**
@@ -372,11 +338,9 @@ static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitle
*/
static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// // The blank region should be all ones
// uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
// dev->addr.val = (addr << (32 - bitlen)) | padding_ones;
abort();
// The blank region should be all ones
uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
dev->addr.val = (addr << (32 - bitlen)) | padding_ones;
}
/**
@@ -387,9 +351,7 @@ static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr,
*/
static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->addr.val = addr;
abort();
dev->addr.val = addr;
}
/**
@@ -400,10 +362,8 @@ static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr)
*/
static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.usr_dummy = dummy_n ? 1 : 0;
// HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1);
abort();
dev->user.usr_dummy = dummy_n ? 1 : 0;
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1);
}
/**
@@ -414,18 +374,14 @@ static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n)
*/
static inline void gpspi_flash_ll_set_hold(spi_dev_t *dev, uint32_t hold_n)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user1.cs_hold_time = hold_n - 1;
// dev->user.cs_hold = (hold_n > 0? 1: 0);
abort();
dev->user1.cs_hold_time = hold_n - 1;
dev->user.cs_hold = (hold_n > 0? 1: 0);
}
static inline void gpspi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_time)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0);
// dev->user1.cs_setup_time = cs_setup_time - 1;
abort();
dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0);
dev->user1.cs_setup_time = cs_setup_time - 1;
}
/**
@@ -437,17 +393,14 @@ static inline void gpspi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup
*/
static inline uint32_t gpspi_flash_ll_calculate_clock_reg(uint8_t clkdiv)
{
// TODO: [ESP32C5] IDF-8698, IDF-8699
// uint32_t div_parameter;
// // See comments of `clock` in `spi_struct.h`
// if (clkdiv == 1) {
// div_parameter = (1 << 31);
// } else {
// div_parameter = ((clkdiv - 1) | (((clkdiv/2 - 1) & 0xff) << 6 ) | (((clkdiv - 1) & 0xff) << 12));
// }
// return div_parameter;
abort();
return (uint32_t)0;
uint32_t div_parameter;
// See comments of `clock` in `spi_struct.h`
if (clkdiv == 1) {
div_parameter = (1 << 31);
} else {
div_parameter = ((clkdiv - 1) | (((clkdiv/2 - 1) & 0xff) << 6 ) | (((clkdiv - 1) & 0xff) << 12));
}
return div_parameter;
}
#ifdef __cplusplus

29
components/hal/esp32c5/include/hal/spi_ll.h
View File

@@ -16,7 +16,6 @@
#include <stdlib.h> //for abs()
#include <string.h>
#include "sdkconfig.h" // TODO: [ESP32C5] IDF-8698 remove
#include "esp_types.h"
#include "soc/spi_periph.h"
#include "soc/spi_struct.h"
@@ -150,15 +149,12 @@ static inline void spi_ll_set_clk_source(spi_dev_t *hw, spi_clock_source_t clk_s
{
uint32_t clk_id = 0;
switch (clk_source) {
// TODO: [ESP32C5] IDF-8698
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
case SOC_MOD_CLK_PLL_F160M:
clk_id = 1;
break;
case SOC_MOD_CLK_RC_FAST:
clk_id = 2;
break;
#endif
case SOC_MOD_CLK_XTAL:
clk_id = 0;
break;
@@ -317,7 +313,7 @@ static inline void spi_ll_slave_reset(spi_dev_t *hw)
/**
* Reset SPI CPU TX FIFO
*
* On esp32c5, this function is not seperated
* On esp32c5, this function is not separated
*
* @param hw Beginning address of the peripheral registers.
*/
@@ -330,7 +326,7 @@ static inline void spi_ll_cpu_tx_fifo_reset(spi_dev_t *hw)
/**
* Reset SPI CPU RX FIFO
*
* On esp32c5, this function is not seperated
* On esp32c5, this function is not separated
*
* @param hw Beginning address of the peripheral registers.
*/
@@ -430,15 +426,12 @@ static inline void spi_ll_dma_set_rx_eof_generation(spi_dev_t *hw, bool enable)
*/
static inline void spi_ll_write_buffer(spi_dev_t *hw, const uint8_t *buffer_to_send, size_t bitlen)
{
// TODO: [ESP32C5] IDF-8698
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
for (int x = 0; x < bitlen; x += 32) {
//Use memcpy to get around alignment issues for txdata
uint32_t word;
memcpy(&word, &buffer_to_send[x / 8], 4);
hw->data_buf[(x / 32)].buf = word;
}
#endif
}
/**
@@ -454,8 +447,7 @@ static inline void spi_ll_write_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t
HAL_ASSERT(byte_id + len <= 64);
HAL_ASSERT(len > 0);
HAL_ASSERT(byte_id >= 0);
// TODO: [ESP32C5] IDF-8698
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
while (len > 0) {
uint32_t word;
int offset = byte_id % 4;
@@ -475,7 +467,6 @@ static inline void spi_ll_write_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t
byte_id += copy_len;
len -= copy_len;
}
#endif
}
/**
@@ -487,8 +478,6 @@ static inline void spi_ll_write_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t
*/
static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, size_t bitlen)
{
// TODO: [ESP32C5] IDF-8698
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
for (int x = 0; x < bitlen; x += 32) {
//Do a memcpy to get around possible alignment issues in rx_buffer
uint32_t word = hw->data_buf[x / 32].buf;
@@ -498,7 +487,6 @@ static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, siz
}
memcpy(&buffer_to_rcv[x / 8], &word, (len + 7) / 8);
}
#endif
}
/**
@@ -511,8 +499,6 @@ static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, siz
*/
static inline void spi_ll_read_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t *out_data, int len)
{
// TODO: [ESP32C5] IDF-8698
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
while (len > 0) {
uint32_t word = hw->data_buf[byte_id / 4].buf;
int offset = byte_id % 4;
@@ -526,7 +512,6 @@ static inline void spi_ll_read_buffer_byte(spi_dev_t *hw, int byte_id, uint8_t *
out_data += copy_len;
len -= copy_len;
}
#endif
}
/*------------------------------------------------------------------------------
@@ -726,7 +711,7 @@ static inline void spi_ll_master_set_clock_by_reg(spi_dev_t *hw, const spi_ll_cl
* Get the frequency of given dividers. Don't use in app.
*
* @param fapb APB clock of the system.
* @param pre Pre devider.
* @param pre Pre divider.
* @param n Main divider.
*
* @return Frequency of given dividers.
@@ -737,10 +722,10 @@ static inline int spi_ll_freq_for_pre_n(int fapb, int pre, int n)
}
/**
* Calculate the nearest frequency avaliable for master.
* Calculate the nearest frequency available for master.
*
* @param fapb APB clock of the system.
* @param hz Frequncy desired.
* @param hz Frequency desired.
* @param duty_cycle Duty cycle desired.
* @param out_reg Output address to store the calculated clock configurations for the return frequency.
*
@@ -820,7 +805,7 @@ static inline int spi_ll_master_cal_clock(int fapb, int hz, int duty_cycle, spi_
*
* @param hw Beginning address of the peripheral registers.
* @param fapb APB clock of the system.
* @param hz Frequncy desired.
* @param hz Frequency desired.
* @param duty_cycle Duty cycle desired.
*
* @return Actual frequency that is used.