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Use the entire sharedbuffer space as the heap of the D/IRAM attribute

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wuzhenghui
2022-07-01 17:46:17 +08:00
parent d6461d91e2
commit 21a4eda4d4
8 changed files with 80 additions and 52 deletions
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3
components/soc/esp32c3/include/soc/soc.h
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@@ -207,7 +207,8 @@
#define SOC_DEBUG_HIGH 0x28000000
// Start (highest address) of ROM boot stack, only relevant during early boot
#define SOC_ROM_STACK_START 0x3fcebf10
#define SOC_ROM_STACK_START 0x3fcde710
#define SOC_ROM_STACK_SIZE 0x2000
//On RISC-V CPUs, the interrupt sources are all external interrupts, whose type, source and priority are configured by SW.
//There is no HW NMI conception. SW should controlled the masked levels through INT_THRESH_REG.