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remove(c5beta3): remove c5 beta3 system files

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This commit is contained in:
laokaiyao
2024-06-11 15:31:03 +08:00
parent 1d894680a8
commit 21f870ecd5
51 changed files with 31 additions and 3238 deletions
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38
components/hal/esp32c5/include/hal/lp_timer_ll.h
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@@ -33,12 +33,7 @@ extern "C" {
*/
FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].hi, main_timer_tar_high, (value >> 32) & 0xFFFF);
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].lo, main_timer_tar_low, value & 0xFFFFFFFF);
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -52,11 +47,7 @@ FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t
*/
FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
dev->target[timer_id].hi.main_timer_tar_en = en;
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -69,12 +60,8 @@ FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_
*/
FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t buffer_id)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].lo, main_timer_buf_low);
#else
HAL_ASSERT(false && "lp_timer not supported yet");
return 0;
#endif
}
/**
@@ -87,12 +74,8 @@ FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev
*/
FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t buffer_id)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].hi, main_timer_buf_high);
#else
HAL_ASSERT(false && "lp_timer not supported yet");
return 0;
#endif
}
/**
@@ -104,11 +87,7 @@ FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *de
*/
FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
dev->update.main_timer_update = 1;
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -120,11 +99,7 @@ FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
*/
FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
dev->int_clr.soc_wakeup_int_clr = 1;
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -136,11 +111,7 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
*/
FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *dev)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
dev->int_clr.overflow_clr = 1;
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -152,11 +123,7 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *de
*/
FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *dev)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
dev->lp_int_clr.main_timer_lp_int_clr = 1;
#else
HAL_ASSERT(false && "lp_timer not supported yet");
#endif
}
/**
@@ -168,13 +135,8 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *de
*/
FORCE_INLINE_ATTR uint64_t lp_timer_ll_time_to_count(uint64_t time_in_us)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
uint32_t slow_clk_value = REG_READ(LP_AON_STORE1_REG);
return ((time_in_us * (1 << RTC_CLK_CAL_FRACT)) / slow_clk_value);
#else
HAL_ASSERT(false && "lp_timer not supported yet");
return 0;
#endif
}
#ifdef __cplusplus