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fix(security): Fixed ESP32S3 Memprot RTCFAST code-execution test

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This commit is contained in:
Martin Vychodil
2024-08-06 11:04:27 +02:00
parent a6b6851f75
commit 22be262fca
2 changed files with 67 additions and 76 deletions
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20
tools/test_apps/system/memprot/pytest_memprot.py
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@@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import logging
import pytest
@@ -23,24 +22,19 @@ MEM_TEST_UNICORE = {
],
'esp32s3': [
['IRAM0_SRAM (core 0)', 'WRX'],
['DRAM0_SRAM (core 0)', 'WR']
# temporarily disabled unless IDF-5208 gets merged
# ['IRAM0_RTCFAST', 'WR'],
['DRAM0_SRAM (core 0)', 'WR'],
['IRAM0_RTCFAST (core 0)', 'WRX']
],
}
MEM_TEST_MULTICORE = {
'esp32s3': [
# instruction execute test temporarily disabled
# ['IRAM0_SRAM (core 0)', 'WRX'],
['IRAM0_SRAM (core 0)', 'WR'],
['IRAM0_SRAM (core 0)', 'WRX'],
['DRAM0_SRAM (core 0)', 'WR'],
# instruction execute test temporarily disabled
# ['IRAM0_SRAM (core 1)', 'WRX'],
['IRAM0_SRAM (core 1)', 'WR'],
['DRAM0_SRAM (core 1)', 'WR']
# temporarily disabled unless IDF-5208 gets merged
# ['IRAM0_RTCFAST', 'WR'],
['IRAM0_RTCFAST (core 0)', 'WRX'],
['IRAM0_SRAM (core 1)', 'WRX'],
['DRAM0_SRAM (core 1)', 'WR'],
['IRAM0_RTCFAST (core 1)', 'WRX']
]
}