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fix(i2s): fix i2s half sample rate issue

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This commit is contained in:
laokaiyao
2024-09-26 15:38:25 +08:00
parent 416d80afc7
commit 22e043e4ce
7 changed files with 215 additions and 175 deletions
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52
components/hal/esp32c6/include/hal/i2s_ll.h
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@@ -281,13 +281,21 @@ static inline void i2s_ll_tx_set_bck_div_num(i2s_dev_t *hw, uint32_t val)
static inline void i2s_ll_tx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, uint32_t x, uint32_t y, uint32_t z, uint32_t yn1)
{
(void)hw;
/* Workaround for the double division issue.
* The division coefficients must be set in particular sequence.
* And it has to switch to a small division first before setting the target division. */
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.i2s_tx_clkm_conf, i2s_tx_clkm_div_num, 2);
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_yn1 = 0;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_y = 1;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_z = 0;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_x = 0;
/* Set the target mclk division coefficients */
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_yn1 = yn1;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_z = z;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_y = y;
PCR.i2s_tx_clkm_div_conf.i2s_tx_clkm_div_x = x;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.i2s_tx_clkm_conf, i2s_tx_clkm_div_num, div_int);
typeof(PCR.i2s_tx_clkm_div_conf) div = {};
div.i2s_tx_clkm_div_x = x;
div.i2s_tx_clkm_div_y = y;
div.i2s_tx_clkm_div_z = z;
div.i2s_tx_clkm_div_yn1 = yn1;
PCR.i2s_tx_clkm_div_conf.val = div.val;
}
/**
@@ -303,13 +311,21 @@ static inline void i2s_ll_tx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, ui
static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, uint32_t x, uint32_t y, uint32_t z, uint32_t yn1)
{
(void)hw;
/* Workaround for the double division issue.
* The division coefficients must be set in particular sequence.
* And it has to switch to a small division first before setting the target division. */
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.i2s_rx_clkm_conf, i2s_rx_clkm_div_num, 2);
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_yn1 = 0;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_y = 1;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_z = 0;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_x = 0;
/* Set the target mclk division coefficients */
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_yn1 = yn1;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_z = z;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_y = y;
PCR.i2s_rx_clkm_div_conf.i2s_rx_clkm_div_x = x;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.i2s_rx_clkm_conf, i2s_rx_clkm_div_num, div_int);
typeof(PCR.i2s_rx_clkm_div_conf) div = {};
div.i2s_rx_clkm_div_x = x;
div.i2s_rx_clkm_div_y = y;
div.i2s_rx_clkm_div_z = z;
div.i2s_rx_clkm_div_yn1 = yn1;
PCR.i2s_rx_clkm_div_conf.val = div.val;
}
/**
@@ -320,12 +336,6 @@ static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, ui
*/
static inline void i2s_ll_tx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
{
/* Workaround for inaccurate clock while switching from a relatively low sample rate to a high sample rate
* Set to particular coefficients first then update to the target coefficients,
* otherwise the clock division might be inaccurate.
* the general idea is to set a value that impossible to calculate from the regular decimal */
i2s_ll_tx_set_raw_clk_div(hw, 7, 317, 7, 3, 0);
uint32_t div_x = 0;
uint32_t div_y = 0;
uint32_t div_z = 0;
@@ -360,12 +370,6 @@ static inline void i2s_ll_rx_set_bck_div_num(i2s_dev_t *hw, uint32_t val)
*/
static inline void i2s_ll_rx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
{
/* Workaround for inaccurate clock while switching from a relatively low sample rate to a high sample rate
* Set to particular coefficients first then update to the target coefficients,
* otherwise the clock division might be inaccurate.
* the general idea is to set a value that impossible to calculate from the regular decimal */
i2s_ll_rx_set_raw_clk_div(hw, 7, 317, 7, 3, 0);
uint32_t div_x = 0;
uint32_t div_y = 0;
uint32_t div_z = 0;