mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-08 20:21:04 +00:00
header files: modify rom code and soc header files
1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions
This commit is contained in:
jack
@@ -25,6 +25,15 @@
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extern "C" {
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#endif
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/** \defgroup gpio_apis, uart configuration and communication related apis
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* @brief gpio apis
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*/
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/** @addtogroup gpio_apis
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* @{
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*/
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#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
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#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
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#define GPIO_PIN_COUNT 40
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@@ -46,9 +55,6 @@ typedef enum{
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GPIO_PIN_INTR_HILEVEL = 5
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}GPIO_INT_TYPE;
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#define GREEN_LED_ON() GPIO_OUTPUT_SET(GPIO_ID_PIN(1) , 0)
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#define GREEN_LED_OFF() GPIO_OUTPUT_SET(GPIO_ID_PIN(1) , 1)
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#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
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((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
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gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
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@@ -58,82 +64,235 @@ typedef enum{
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/* GPIO interrupt handler, registered through gpio_intr_handler_register */
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typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
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/**
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* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
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* to initialize "output enables" and pin configurations for each gpio pin.
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* Please do not call this function in SDK.
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*
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* @param None
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*
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* @return None
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*/
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void gpio_init(void);
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/*
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* Initialize GPIO. This includes reading the GPIO Configuration DataSet
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* to initialize "output enables" and pin configurations for each gpio pin.
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* Must be called once during startup.
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*/
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void gpio_init(void) ROMFN_ATTR;
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/**
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* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
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* There is no particular ordering guaranteed; so if the order of writes is significant,
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* calling code should divide a single call into multiple calls.
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*
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* @param uint32_t set_mask : the gpios that need high level.
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*
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* @param uint32_t clear_mask : the gpios that need low level.
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*
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* @param uint32_t enable_mask : the gpios that need be changed.
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*
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* @param uint32_t disable_mask : the gpios that need diable output.
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*
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* @return None
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*/
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void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
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/*
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* Change GPIO pin output by setting, clearing, or disabling pins.
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* In general, it is expected that a bit will be set in at most one
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* of these masks. If a bit is clear in all masks, the output state
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* remains unchanged.
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*
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* There is no particular ordering guaranteed; so if the order of
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* writes is significant, calling code should divide a single call
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* into multiple calls.
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*/
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void gpio_output_set(uint32_t set_mask,
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uint32_t clear_mask,
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uint32_t enable_mask,
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uint32_t disable_mask) ROMFN_ATTR;
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void gpio_output_set_high(uint32_t set_mask,
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uint32_t clear_mask,
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uint32_t enable_mask,
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uint32_t disable_mask) ROMFN_ATTR;
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/*
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* Sample the value of GPIO input pins and returns a bitmask.
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*/
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uint32_t gpio_input_get(void) ROMFN_ATTR;
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uint32_t gpio_input_get_high(void) ROMFN_ATTR;
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/**
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* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
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* There is no particular ordering guaranteed; so if the order of writes is significant,
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* calling code should divide a single call into multiple calls.
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*
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* @param uint32_t set_mask : the gpios that need high level.
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*
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* @param uint32_t clear_mask : the gpios that need low level.
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*
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* @param uint32_t enable_mask : the gpios that need be changed.
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*
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* @param uint32_t disable_mask : the gpios that need diable output.
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*
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* @return None
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*/
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void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
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/*
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* Set the specified GPIO register to the specified value.
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* This is a very general and powerful interface that is not
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* expected to be used during normal operation. It is intended
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* mainly for debug, or for unusual requirements.
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*/
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void gpio_register_set(uint32_t reg_id, uint32_t value) ROMFN_ATTR;
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/**
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* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
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*
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* @param None
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*
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* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
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*/
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uint32_t gpio_input_get(void);
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/* Get the current value of the specified GPIO register. */
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uint32_t gpio_register_get(uint32_t reg_id) ROMFN_ATTR;
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/**
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* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
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*
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* @param None
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*
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* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
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*/
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uint32_t gpio_input_get_high(void);
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/*
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* Register an application-specific interrupt handler for GPIO pin
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* interrupts. Once the interrupt handler is called, it will not
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* be called again until after a call to gpio_intr_ack. Any GPIO
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* interrupts that occur during the interim are masked.
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*
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* The application-specific handler is called with a mask of
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* pending GPIO interrupts. After processing pin interrupts, the
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* application-specific handler may wish to use gpio_intr_pending
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* to check for any additional pending interrupts before it returns.
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*/
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void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg) ROMFN_ATTR;
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/**
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* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
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* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
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* Please do not call this function in SDK.
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*
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* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
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*
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* @param void *arg : gpio application-specific interrupt handler argument.
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*
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* @return None
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*/
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void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
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/* Determine which GPIO interrupts are pending. */
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uint32_t gpio_intr_pending(void) ROMFN_ATTR;
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uint32_t gpio_intr_pending_high(void) ROMFN_ATTR;
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/**
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* @brief Get gpio interrupts which happens but not processed.
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* Please do not call this function in SDK.
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*
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* @param None
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*
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* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
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*/
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uint32_t gpio_intr_pending(void);
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/*
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* Acknowledge GPIO interrupts.
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* Intended to be called from the gpio_intr_handler_fn.
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*/
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void gpio_intr_ack(uint32_t ack_mask) ROMFN_ATTR;
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void gpio_intr_ack_high(uint32_t ack_mask) ROMFN_ATTR;
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/**
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* @brief Get gpio interrupts which happens but not processed.
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* Please do not call this function in SDK.
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*
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* @param None
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*
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* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
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*/
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uint32_t gpio_intr_pending_high(void);
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void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state) ROMFN_ATTR;
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/**
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* @brief Ack gpio interrupts to process pending interrupts.
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* Please do not call this function in SDK.
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*
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* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
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*
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* @return None
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*/
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void gpio_intr_ack(uint32_t ack_mask);
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void gpio_pin_wakeup_disable() ROMFN_ATTR;
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/**
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* @brief Ack gpio interrupts to process pending interrupts.
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* Please do not call this function in SDK.
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*
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* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
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*
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* @return None
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*/
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void gpio_intr_ack_high(uint32_t ack_mask);
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//extern void gpio_module_install(struct gpio_api *api);
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/**
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* @brief Set GPIO to wakeup the ESP32.
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* Please do not call this function in SDK.
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*
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* @param uint32_t i: gpio number.
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*
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* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
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*
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* @return None
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*/
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void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
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void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv) ROMFN_ATTR;
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/**
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* @brief disable GPIOs to wakeup the ESP32.
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* Please do not call this function in SDK.
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*
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* @param None
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*
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* @return None
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*/
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void gpio_pin_wakeup_disable();
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void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv) ROMFN_ATTR;
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/**
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* @brief set gpio input to a signal, one gpio can input to several signals.
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*
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* @param uint32_t gpio : gpio number, 0~0x27
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* gpio == 0x30, input 0 to signal
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* gpio == 0x34, ???
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* gpio == 0x38, input 1 to signal
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*
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* @param uint32_t signal_idx : signal index.
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*
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* @param bool inv : the signal is inv or not
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*
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* @return None
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*/
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void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
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/**
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* @brief set signal output to gpio, one signal can output to several gpios.
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*
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* @param uint32_t gpio : gpio number, 0~0x27
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*
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* @param uint32_t signal_idx : signal index.
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* signal_idx == 0x100, cancel output put to the gpio
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*
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* @param bool out_inv : the signal output is inv or not
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*
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* @param bool oen_inv : the signal output enable is inv or not
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*
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* @return None
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*/
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void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
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/**
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* @brief Select pad as a gpio function from IOMUX.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @return None
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*/
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void gpio_pad_select_gpio(uint8_t gpio_num);
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/**
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* @brief Set pad driver capability.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @param uint8_t drv : 0-3
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*
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* @return None
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*/
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void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv);
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/**
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* @brief Pull up the pad from gpio number.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @return None
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*/
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void gpio_pad_pullup(uint8_t gpio_num);
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/**
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* @brief Pull down the pad from gpio number.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @return None
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*/
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void gpio_pad_pulldown(uint8_t gpio_num);
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/**
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* @brief Unhold the pad from gpio number.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @return None
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*/
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void gpio_pad_unhold(uint8_t gpio_num);
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/**
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* @brief Hold the pad from gpio number.
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*
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* @param uint32_t gpio_num : gpio number, 0~0x27
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*
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* @return None
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*/
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void gpio_pad_hold(uint8_t gpio_num);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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