i2s: Fix esp32c6 get I2S_CLK_SRC_PLL_160M clock frequency value wrong issue

This commit is contained in:
Song Ruo Jing
2022-12-01 12:56:36 +08:00
parent 182e937c5a
commit 244d3caa97
20 changed files with 58 additions and 5 deletions

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@@ -32,6 +32,8 @@ extern "C" {
#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9)
#define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
/* I2S clock configuration structure */
typedef struct {
uint16_t mclk_div; // I2S module clock divider, Fmclk = Fsclk /(mclk_div+b/a)