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i2s: Fix esp32c6 get I2S_CLK_SRC_PLL_160M clock frequency value wrong issue

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This commit is contained in:
Song Ruo Jing
2022-12-01 12:56:36 +08:00
parent 182e937c5a
commit 244d3caa97
20 changed files with 58 additions and 5 deletions
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4
components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@@ -299,6 +299,10 @@ config SOC_I2S_SUPPORTS_APLL
bool
default y
config SOC_I2S_SUPPORTS_PLL_F160M
bool
default y
config SOC_I2S_SUPPORTS_PDM
bool
default y

6
components/soc/esp32/include/soc/clk_tree_defs.h
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@@ -244,15 +244,15 @@ typedef enum {
/**
* @brief Array initializer for all supported clock sources of I2S
*/
#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_D2, SOC_MOD_CLK_APLL}
#define SOC_I2S_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_APLL}
/**
* @brief I2S clock source enum
*
*/
typedef enum {
I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the default source clock */
I2S_CLK_SRC_PLL_160M = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the source clock */
I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default source clock */
I2S_CLK_SRC_PLL_160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
I2S_CLK_SRC_APLL = SOC_MOD_CLK_APLL, /*!< Select APLL as the source clock */
} soc_periph_i2s_clk_src_t;

1
components/soc/esp32/include/soc/soc_caps.h
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@@ -185,6 +185,7 @@
#define SOC_I2S_NUM (2U)
#define SOC_I2S_HW_VERSION_1 (1)
#define SOC_I2S_SUPPORTS_APLL (1)
#define SOC_I2S_SUPPORTS_PLL_F160M (1)
#define SOC_I2S_SUPPORTS_PDM (1)
#define SOC_I2S_SUPPORTS_PDM_TX (1)
#define SOC_I2S_PDM_MAX_TX_LINES (1U)