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ci: support to build esp32s2beta simple examples

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Michael (XIAO Xufeng)
2019-07-08 09:16:06 +08:00
committed by Angus Gratton
parent 4ce00a4829
commit 25ab8380c8
112 changed files with 278 additions and 48 deletions
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2
components/esp32s2beta/cache_err_int.c
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@@ -52,7 +52,7 @@ void esp_cache_err_int_init()
// interrupt is connected to PRO CPU and invalid access happens on the APP
// CPU.
#warning "TODO: implement cache error access interrupt for esp32s2beta"
// TODO: implement cache error access interrupt for esp32s2beta - IDF-752
#if 0
DPORT_SET_PERI_REG_MASK(DPORT_PRO_CACHE_IA_INT_EN_REG,
DPORT_CACHE_IA_INT_PRO_DRAM1 |