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fix(freertos): Use INTERRUPT_CURRENT_CORE_INT_THRESH_REG for esp32p4
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -10,6 +10,7 @@
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#include "soc/soc_caps.h"
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// ESP32C6 should use the PLIC controller as the interrupt controller instead of INTC (SOC_INT_PLIC_SUPPORTED = y)
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#define INTERRUPT_CURRENT_CORE_INT_THRESH_REG INTERRUPT_CORE0_CPU_INT_THRESH_REG
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#define INTERRUPT_CORE0_CPU_INT_ENABLE_REG PLIC_MXINT_ENABLE_REG
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#define INTERRUPT_CORE0_CPU_INT_THRESH_REG PLIC_MXINT_THRESH_REG
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#define INTERRUPT_CORE0_CPU_INT_CLEAR_REG PLIC_MXINT_CLEAR_REG
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