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fix(mipi_dsi): only wait ready for enabled data lane

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morris
2024-04-29 18:37:50 +08:00
parent 4c6b375666
commit 28073d9991
4 changed files with 21 additions and 6 deletions
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3
components/hal/esp32p4/include/hal/mipi_dsi_ll.h
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@@ -14,7 +14,8 @@
#include "hal/mipi_dsi_brg_ll.h"
#include "hal/mipi_dsi_phy_ll.h"
#define MIPI_DSI_LL_NUM_BUS 1 // 1 MIPI DSI bus
#define MIPI_DSI_LL_NUM_BUS 1 // support only 1 MIPI DSI bus
#define MIPI_DSI_LL_MAX_DATA_LANES 2 // support up to 2 data lanes
#ifdef __cplusplus
extern "C" {

11
components/hal/esp32p4/include/hal/mipi_dsi_phy_ll.h
View File

@@ -81,12 +81,19 @@ static inline bool mipi_dsi_phy_ll_is_pll_locked(dsi_host_dev_t *dev)
* @brief Check if the all active lanes are in the stop state
*
* @param dev Pointer to the DSI Host controller register base address
* @param num_data_lanes Number of data lanes
* @return True if the lanes are all in stop state, False otherwise
*/
static inline bool mipi_dsi_phy_ll_are_lanes_stopped(dsi_host_dev_t *dev)
static inline bool mipi_dsi_phy_ll_are_lanes_stopped(dsi_host_dev_t *dev, uint8_t num_data_lanes)
{
uint32_t status = dev->phy_status.val;
const uint32_t mask = 1 << 2 | 1 << 4 | 1 << 7;
uint32_t mask = 1 << 2;
if (num_data_lanes > 0) {
mask |= 1 << 4;
}
if (num_data_lanes > 1) {
mask |= 1 << 7;
}
return (status & mask) == mask;
}