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https://github.com/espressif/esp-idf.git
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feat(efuse): Adds new efuses for esp32p4
This commit is contained in:
Konstantin Kondrashov
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -9,7 +9,7 @@
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#include <assert.h>
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#include "esp_efuse_table.h"
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// md5_digest_table 78dff63df528392f0f37f4880b83c6db
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// md5_digest_table 2eb36a43d52e9922e08cf545d0e23381
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// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
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// If you want to change some fields, you need to change esp_efuse_table.csv file
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// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
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@@ -75,18 +75,74 @@ static const esp_efuse_desc_t WR_DIS_MAC[] = {
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{EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
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};
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static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of MAC_EXT,
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static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR,
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};
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static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA1[] = {
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{EFUSE_BLK0, 21, 1}, // [WR_DIS.SYS_DATA_PART1] wr_dis of BLOCK_SYS_DATA1,
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static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR,
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};
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static const esp_efuse_desc_t WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR,
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};
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static const esp_efuse_desc_t WR_DIS_DISABLE_BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of DISABLE_BLK_VERSION_MAJOR,
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};
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static const esp_efuse_desc_t WR_DIS_BLK_VERSION_MINOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MINOR,
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};
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static const esp_efuse_desc_t WR_DIS_BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MAJOR,
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};
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static const esp_efuse_desc_t WR_DIS_FLASH_CAP[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_CAP,
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};
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static const esp_efuse_desc_t WR_DIS_FLASH_TEMP[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_TEMP,
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};
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static const esp_efuse_desc_t WR_DIS_FLASH_VENDOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_VENDOR,
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};
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static const esp_efuse_desc_t WR_DIS_PSRAM_CAP[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of PSRAM_CAP,
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};
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static const esp_efuse_desc_t WR_DIS_PSRAM_TEMP[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of PSRAM_TEMP,
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};
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static const esp_efuse_desc_t WR_DIS_PSRAM_VENDOR[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of PSRAM_VENDOR,
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};
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static const esp_efuse_desc_t WR_DIS_PKG_VERSION[] = {
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{EFUSE_BLK0, 20, 1}, // [] wr_dis of PKG_VERSION,
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};
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static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
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};
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static const esp_efuse_desc_t WR_DIS_OPTIONAL_UNIQUE_ID[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
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};
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static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = {
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{EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
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};
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static const esp_efuse_desc_t WR_DIS_CUSTOM_MAC[] = {
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{EFUSE_BLK0, 22, 1}, // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC,
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};
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static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = {
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{EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
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};
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@@ -195,12 +251,8 @@ static const esp_efuse_desc_t USB_PHY_SEL[] = {
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{EFUSE_BLK0, 57, 1}, // [] TBD,
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};
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static const esp_efuse_desc_t KM_HUK_GEN_STATE_LOW[] = {
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{EFUSE_BLK0, 58, 6}, // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid,
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};
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static const esp_efuse_desc_t KM_HUK_GEN_STATE_HIGH[] = {
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{EFUSE_BLK0, 64, 3}, // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid,
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static const esp_efuse_desc_t KM_HUK_GEN_STATE[] = {
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{EFUSE_BLK0, 58, 9}, // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid,
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};
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static const esp_efuse_desc_t KM_RND_SWITCH_CYCLE[] = {
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@@ -400,13 +452,60 @@ static const esp_efuse_desc_t MAC[] = {
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{EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address,
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};
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static const esp_efuse_desc_t MAC_EXT[] = {
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{EFUSE_BLK1, 48, 8}, // [] Stores the extended bits of MAC address [0],
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{EFUSE_BLK1, 56, 8}, // [] Stores the extended bits of MAC address [1],
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static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
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{EFUSE_BLK1, 64, 4}, // [] Minor chip version,
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};
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static const esp_efuse_desc_t BLOCK_SYS_DATA1[] = {
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{EFUSE_BLK2, 0, 256}, // [SYS_DATA_PART1] System data part 1,
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static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 68, 2}, // [] Major chip version,
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};
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static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 70, 1}, // [] Disables check of wafer version major,
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};
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static const esp_efuse_desc_t DISABLE_BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 71, 1}, // [] Disables check of blk version major,
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};
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static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
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{EFUSE_BLK1, 72, 3}, // [] BLK_VERSION_MINOR of BLOCK2,
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};
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static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 75, 2}, // [] BLK_VERSION_MAJOR of BLOCK2,
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};
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static const esp_efuse_desc_t FLASH_CAP[] = {
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{EFUSE_BLK1, 77, 3}, // [] Flash capacity,
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};
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static const esp_efuse_desc_t FLASH_TEMP[] = {
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{EFUSE_BLK1, 80, 2}, // [] Flash temperature,
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};
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static const esp_efuse_desc_t FLASH_VENDOR[] = {
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{EFUSE_BLK1, 82, 3}, // [] Flash vendor,
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};
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static const esp_efuse_desc_t PSRAM_CAP[] = {
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{EFUSE_BLK1, 85, 2}, // [] PSRAM capacity,
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};
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static const esp_efuse_desc_t PSRAM_TEMP[] = {
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{EFUSE_BLK1, 87, 2}, // [] PSRAM temperature,
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};
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static const esp_efuse_desc_t PSRAM_VENDOR[] = {
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{EFUSE_BLK1, 89, 2}, // [] PSRAM vendor,
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};
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static const esp_efuse_desc_t PKG_VERSION[] = {
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{EFUSE_BLK1, 91, 3}, // [] Package version,
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};
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static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
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{EFUSE_BLK2, 0, 128}, // [] Optional unique 128-bit ID,
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};
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static const esp_efuse_desc_t USER_DATA[] = {
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@@ -414,7 +513,7 @@ static const esp_efuse_desc_t USER_DATA[] = {
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};
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static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
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{EFUSE_BLK3, 200, 48}, // [MAC_CUSTOM CUSTOM_MAC] Custom MAC (TODO,
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{EFUSE_BLK3, 200, 48}, // [MAC_CUSTOM CUSTOM_MAC] Custom MAC,
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};
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static const esp_efuse_desc_t KEY0[] = {
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@@ -524,13 +623,78 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
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&WR_DIS_MAC_EXT[0], // [] wr_dis of MAC_EXT
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
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&WR_DIS_WAFER_VERSION_MINOR[0], // [] wr_dis of WAFER_VERSION_MINOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA1[] = {
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&WR_DIS_BLOCK_SYS_DATA1[0], // [WR_DIS.SYS_DATA_PART1] wr_dis of BLOCK_SYS_DATA1
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[] = {
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&WR_DIS_WAFER_VERSION_MAJOR[0], // [] wr_dis of WAFER_VERSION_MAJOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = {
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&WR_DIS_DISABLE_WAFER_VERSION_MAJOR[0], // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_BLK_VERSION_MAJOR[] = {
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&WR_DIS_DISABLE_BLK_VERSION_MAJOR[0], // [] wr_dis of DISABLE_BLK_VERSION_MAJOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[] = {
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&WR_DIS_BLK_VERSION_MINOR[0], // [] wr_dis of BLK_VERSION_MINOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MAJOR[] = {
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&WR_DIS_BLK_VERSION_MAJOR[0], // [] wr_dis of BLK_VERSION_MAJOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[] = {
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&WR_DIS_FLASH_CAP[0], // [] wr_dis of FLASH_CAP
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[] = {
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&WR_DIS_FLASH_TEMP[0], // [] wr_dis of FLASH_TEMP
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[] = {
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&WR_DIS_FLASH_VENDOR[0], // [] wr_dis of FLASH_VENDOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PSRAM_CAP[] = {
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&WR_DIS_PSRAM_CAP[0], // [] wr_dis of PSRAM_CAP
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PSRAM_TEMP[] = {
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&WR_DIS_PSRAM_TEMP[0], // [] wr_dis of PSRAM_TEMP
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PSRAM_VENDOR[] = {
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&WR_DIS_PSRAM_VENDOR[0], // [] wr_dis of PSRAM_VENDOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[] = {
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&WR_DIS_PKG_VERSION[0], // [] wr_dis of PKG_VERSION
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
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&WR_DIS_SYS_DATA_PART1[0], // [] wr_dis of BLOCK2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OPTIONAL_UNIQUE_ID[] = {
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&WR_DIS_OPTIONAL_UNIQUE_ID[0], // [] wr_dis of OPTIONAL_UNIQUE_ID
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NULL
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};
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@@ -539,6 +703,11 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CUSTOM_MAC[] = {
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&WR_DIS_CUSTOM_MAC[0], // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = {
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&WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
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NULL
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@@ -674,13 +843,8 @@ const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_KM_HUK_GEN_STATE_LOW[] = {
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&KM_HUK_GEN_STATE_LOW[0], // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_KM_HUK_GEN_STATE_HIGH[] = {
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&KM_HUK_GEN_STATE_HIGH[0], // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
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const esp_efuse_desc_t* ESP_EFUSE_KM_HUK_GEN_STATE[] = {
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&KM_HUK_GEN_STATE[0], // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
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NULL
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};
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@@ -929,14 +1093,73 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
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&MAC_EXT[0], // [] Stores the extended bits of MAC address [0]
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&MAC_EXT[1], // [] Stores the extended bits of MAC address [1]
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const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
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&WAFER_VERSION_MINOR[0], // [] Minor chip version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLOCK_SYS_DATA1[] = {
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&BLOCK_SYS_DATA1[0], // [SYS_DATA_PART1] System data part 1
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const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = {
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&WAFER_VERSION_MAJOR[0], // [] Major chip version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
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&DISABLE_WAFER_VERSION_MAJOR[0], // [] Disables check of wafer version major
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[] = {
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&DISABLE_BLK_VERSION_MAJOR[0], // [] Disables check of blk version major
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
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&BLK_VERSION_MINOR[0], // [] BLK_VERSION_MINOR of BLOCK2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[] = {
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&BLK_VERSION_MAJOR[0], // [] BLK_VERSION_MAJOR of BLOCK2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
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&FLASH_CAP[0], // [] Flash capacity
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[] = {
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&FLASH_TEMP[0], // [] Flash temperature
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
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&FLASH_VENDOR[0], // [] Flash vendor
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PSRAM_CAP[] = {
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&PSRAM_CAP[0], // [] PSRAM capacity
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PSRAM_TEMP[] = {
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&PSRAM_TEMP[0], // [] PSRAM temperature
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VENDOR[] = {
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&PSRAM_VENDOR[0], // [] PSRAM vendor
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
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&PKG_VERSION[0], // [] Package version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
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&OPTIONAL_UNIQUE_ID[0], // [] Optional unique 128-bit ID
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NULL
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};
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@@ -946,7 +1169,7 @@ const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
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};
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const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
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&USER_DATA_MAC_CUSTOM[0], // [MAC_CUSTOM CUSTOM_MAC] Custom MAC (TODO
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&USER_DATA_MAC_CUSTOM[0], // [MAC_CUSTOM CUSTOM_MAC] Custom MAC
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NULL
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};
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