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https://github.com/espressif/esp-idf.git
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Separate USB HAL and common USB types
This commit separates out the common USB types used throughout most of the stack into its own header file inside the USB component. The types used in the USB HAL are now exclusive to the HAL.
This commit is contained in:
49
components/hal/esp32s2/include/hal/usb_types_private.h
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49
components/hal/esp32s2/include/hal/usb_types_private.h
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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Note: This header file contains USB2.0 related types and macros that can be used by code specific to the DWC_OTG
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controller (i.e., the HW specific layers of the USB host stack). Thus, this header is only meant to be used below (and
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including) the HAL layer. For types and macros that are HW implementation agnostic (i.e., HCD layer and above), add them
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to the "usb.h" header instead.
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @brief USB speeds supported by the DWC OTG controller
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*/
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typedef enum {
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USB_PRIV_SPEED_FULL,
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USB_PRIV_SPEED_LOW,
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} usb_priv_speed_t;
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/**
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* @brief USB transfer types supported by the DWC OTG controller
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*/
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typedef enum {
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USB_PRIV_XFER_TYPE_CTRL,
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USB_PRIV_XFER_TYPE_ISOCHRONOUS,
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USB_PRIV_XFER_TYPE_BULK,
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USB_PRIV_XFER_TYPE_INTR,
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} usb_priv_xfer_type_t;
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#ifdef __cplusplus
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}
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#endif
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@@ -28,7 +28,7 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
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#include "soc/usbh_struct.h"
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#include "soc/usb_wrap_struct.h"
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#include "hal/usbh_ll.h"
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#include "hal/usb_types.h"
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#include "hal/usb_types_private.h"
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/* -----------------------------------------------------------------------------
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------------------------------- Macros and Types -------------------------------
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@@ -121,7 +121,7 @@ typedef enum {
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typedef struct {
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union {
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struct {
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usb_xfer_type_t type: 2; /**< The type of endpoint */
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usb_priv_xfer_type_t type: 2; /**< The type of endpoint */
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uint32_t bEndpointAddress: 8; /**< Endpoint address (containing endpoint number and direction) */
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uint32_t mps: 11; /**< Maximum Packet Size */
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uint32_t dev_addr: 8; /**< Device Address */
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@@ -413,9 +413,9 @@ static inline bool usbh_hal_port_check_if_connected(usbh_hal_context_t *hal)
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* connected to the host port
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*
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* @param hal Context of the HAL layer
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* @return usb_speed_t Speed of the connected device
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* @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2)
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*/
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static inline usb_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
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static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
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{
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return usbh_ll_hprt_get_speed(hal->dev);
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}
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@@ -22,7 +22,7 @@ extern "C" {
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#include <stdbool.h>
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#include "soc/usbh_struct.h"
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#include "soc/usb_wrap_struct.h"
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#include "hal/usb_types.h"
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#include "hal/usb_types_private.h"
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/* -----------------------------------------------------------------------------
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------------------------------- Global Registers -------------------------------
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@@ -419,7 +419,7 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
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*
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* @param hw
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*/
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static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
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static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
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{
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hw->hcfg_reg.descdma = 1; //Enable scatt/gatt
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hw->hcfg_reg.fslssupp = 1; //FS/LS supp only
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@@ -428,13 +428,13 @@ static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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*/
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hw->hcfg_reg.fslspclksel = (speed == USB_SPEED_FULL) ? 1 : 2;
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hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2; //esp32-s2 only supports FS or LS
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hw->hcfg_reg.perschedena = 0; //Disable perio sched
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}
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// ----------------------------- HFIR Register ---------------------------------
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static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
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static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
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{
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usb_hfir_reg_t hfir;
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hfir.val = hw->hfir_reg.val;
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@@ -444,7 +444,7 @@ static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
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Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
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so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
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*/
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hfir.frint = (speed == USB_SPEED_FULL) ? 48000 : 6000;
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hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-s2 only supports FS or LS
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hw->hfir_reg.val = hfir.val;
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}
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@@ -510,14 +510,19 @@ static inline uint32_t usbh_ll_get_frame_list_base_addr(usbh_dev_t *hw)
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// ----------------------------- HPRT Register ---------------------------------
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static inline usb_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
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static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
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{
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int prtspd = hw->hprt_reg.prtspd;
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if (prtspd == 1) {
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return USB_SPEED_FULL;
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} else {
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return USB_SPEED_LOW;
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usb_priv_speed_t speed;
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//esp32-s2 only supports FS or LS
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switch (hw->hprt_reg.prtspd) {
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case 1:
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speed = USB_PRIV_SPEED_FULL;
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break;
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default:
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speed = USB_PRIV_SPEED_LOW;
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break;
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}
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return speed;
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}
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static inline uint32_t usbh_ll_hprt_get_test_ctl(usbh_dev_t *hw)
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@@ -674,24 +679,24 @@ static inline void usbh_ll_chan_set_dev_addr(volatile usb_host_chan_regs_t *chan
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chan->hcchar_reg.devaddr = addr;
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}
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static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_xfer_type_t type)
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static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_priv_xfer_type_t type)
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{
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uint32_t ep_type;
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switch (type) {
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case USB_XFER_TYPE_CTRL:
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chan->hcchar_reg.eptype = 0x0;
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case USB_PRIV_XFER_TYPE_CTRL:
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ep_type = 0;
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break;
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case USB_XFER_TYPE_ISOCHRONOUS:
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chan->hcchar_reg.eptype = 0x1;
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case USB_PRIV_XFER_TYPE_ISOCHRONOUS:
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ep_type = 1;
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break;
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case USB_XFER_TYPE_BULK:
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chan->hcchar_reg.eptype = 0x2;
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case USB_PRIV_XFER_TYPE_BULK:
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ep_type = 2;
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break;
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case USB_XFER_TYPE_INTR:
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chan->hcchar_reg.eptype = 0x3;
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default: //USB_PRIV_XFER_TYPE_INTR
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ep_type = 3;
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break;
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default:
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;
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}
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chan->hcchar_reg.eptype = ep_type;
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}
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//Indicates whether channel is commuunicating with a LS device connected via a FS hub. Setting this bit to 1 will cause
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@@ -716,9 +721,9 @@ static inline void usbh_ll_chan_set_mps(volatile usb_host_chan_regs_t *chan, uin
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chan->hcchar_reg.mps = mps;
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}
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static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_xfer_type_t type, bool is_in, bool is_ls)
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static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_priv_xfer_type_t type, bool is_in, bool is_ls)
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{
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//Sets all persistent fields of the channel over its lifetime
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//Sets all persistent fields of the channel over its lifetimez
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usbh_ll_chan_set_dev_addr(chan, dev_addr);
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usbh_ll_chan_set_ep_type(chan, type);
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usbh_ll_chan_set_lspddev(chan, is_ls);
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// -------------------------------- Constants ----------------------------------
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#define BENDPOINTADDRESS_NUM_MSK 0x0F //Endpoint number mask of the bEndpointAddress field of an endpoint descriptor
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#define BENDPOINTADDRESS_DIR_MSK 0x80 //Endpoint direction mask of the bEndpointAddress field of an endpoint descriptor
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#define CORE_REG_GSNPSID 0x4F54400A
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#define CORE_REG_GHWCFG1 0x00000000
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#define CORE_REG_GHWCFG2 0x224DD930
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@@ -193,7 +196,7 @@ static inline void debounce_lock_enable(usbh_hal_context_t *hal)
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void usbh_hal_port_enable(usbh_hal_context_t *hal)
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{
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usb_speed_t speed = usbh_ll_hprt_get_speed(hal->dev);
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usb_priv_speed_t speed = usbh_ll_hprt_get_speed(hal->dev);
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//Host Configuration
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usbh_ll_hcfg_set_defaults(hal->dev, speed);
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//Todo: Set frame list entries and ena per sched
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@@ -265,10 +268,10 @@ void usbh_hal_chan_set_ep_char(usbh_hal_chan_t *chan_obj, usbh_hal_ep_char_t *ep
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//Set the endpoint characteristics of the pipe
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usbh_ll_chan_hcchar_init(chan_obj->regs,
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ep_char->dev_addr,
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ep_char->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK,
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ep_char->bEndpointAddress & BENDPOINTADDRESS_NUM_MSK,
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ep_char->mps,
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ep_char->type,
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ep_char->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK,
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ep_char->bEndpointAddress & BENDPOINTADDRESS_DIR_MSK,
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ep_char->ls_via_fs_hub);
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}
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