alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-30 22:05:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'refactor/add_lp_uart_test' into 'master'

Browse Source 
Refactor/add lp uart test

See merge request espressif/esp-idf!28681
This commit is contained in:
Song Ruo Jing
2024-02-07 20:02:46 +08:00
parent 1a80217af5 5276cd4f1d
commit 2a585f58a0
20 changed files with 372 additions and 144 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
docs/en/api-reference/peripherals/uart.rst
View File

@@ -245,6 +245,26 @@ Macros
The API also defines several macros. For example, :c:macro:`UART_HW_FIFO_LEN` defines the length of hardware FIFO buffers; :c:macro:`UART_BITRATE_MAX` gives the maximum baud rate supported by the UART controllers, etc.
.. only:: SOC_UART_LP_NUM
Use LP UART Controller with HP Core
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The UART driver also supports to control the LP UART controller when the chip is in active mode. The configuration steps for the LP UART are no difference with the steps for a normal UART controller, except:
1. The port number for the LP UART controller is defined by :c:macro:`LP_UART_NUM_0`.
2. The available clock sources for the LP UART controller can be found in :cpp:type:`lp_uart_sclk_t`.
3. The size of the hardware FIFO for the LP UART controller is much smaller, which is defined in :c:macro:`SOC_LP_UART_FIFO_LEN`.
.. only:: SOC_LP_GPIO_MATRIX_SUPPORTED
4. The GPIO pins for the LP UART controller can only be selected from the LP GPIO pins.
.. only:: not SOC_LP_GPIO_MATRIX_SUPPORTED
4. The GPIO pins for the LP UART controller are unalterable, because there is no LP GPIO matrix on the target. Please see **{IDF_TARGET_NAME} Technical Reference Manual** > **IO MUX and GPIO Matrix (GPIO, IO MUX)** > **LP IO MUX Functions List** [`PDF <{IDF_TARGET_TRM_EN_URL}#lp-io-mux-func-list>`__] for the specific pin numbers.
.. _uart-api-deleting-driver:
Deleting a Driver