feat(mbedtls/aes): Support AES-DMA operations by satisfying L1 cache alignment requirements

- Use DMA RX done interrupt status bit while waiting for DMA rx transfer
This commit is contained in:
harshal.patil
2023-12-12 21:12:41 +05:30
parent 9b15189583
commit 2abb656ba2
9 changed files with 1048 additions and 652 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,6 +17,20 @@ extern "C" {
bool valid_key_length(const esp_aes_context *ctx);
#if SOC_AES_SUPPORT_DMA
/**
* @brief Run a AES operation using DMA
*
* @param ctx Aes context
* @param input Pointer to input data
* @param output Pointer to output data
* @param len Length of the input data
* @param stream_out The saved stream-block for resuming next operation.
* @return int -1 on error
*/
int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsigned char *output, size_t len, uint8_t *stream_out);
#endif
#if SOC_AES_SUPPORT_GCM
/**
* @brief Run a AES-GCM conversion using DMA