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refactor(clk): add soc_clk_calibration_clk_src_t for all targets

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Cleaned up RTC calibration clock selection code
This commit is contained in:
Song Ruo Jing
2025-07-21 22:00:00 +08:00
parent 07120c1d38
commit 2b01b7c6f8
54 changed files with 786 additions and 495 deletions
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67
components/hal/esp32p4/include/hal/clk_tree_ll.h
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@@ -725,6 +725,73 @@ static inline __attribute__((always_inline)) uint32_t clk_ll_pll_f20m_get_divide
return HAL_FORCE_READ_U32_REG_FIELD(HP_SYS_CLKRST.ref_clk_ctrl1, reg_ref_20m_clk_div_num) + 1;
}
/**
* @brief Select the calibration clock source for timergroup0
*
* @param clk_sel One of the clock sources in soc_timg0_calibration_clk_src_t
*/
static inline __attribute__((always_inline)) void clk_ll_calibration_set_target(soc_timg0_calibration_clk_src_t clk_sel)
{
int timg_cali_clk_sel = -1;
switch (clk_sel) {
case CLK_CAL_MPLL:
timg_cali_clk_sel = 0;
break;
case CLK_CAL_SPLL:
timg_cali_clk_sel = 1;
break;
case CLK_CAL_CPLL:
timg_cali_clk_sel = 2;
break;
case CLK_CAL_APLL:
timg_cali_clk_sel = 3;
break;
case CLK_CAL_SDIO_PLL0:
timg_cali_clk_sel = 4;
break;
case CLK_CAL_SDIO_PLL1:
timg_cali_clk_sel = 5;
break;
case CLK_CAL_SDIO_PLL2:
timg_cali_clk_sel = 6;
break;
case CLK_CAL_RC_FAST:
timg_cali_clk_sel = 7;
break;
case CLK_CAL_RC_SLOW:
timg_cali_clk_sel = 8;
break;
case CLK_CAL_RC32K:
timg_cali_clk_sel = 9;
break;
case CLK_CAL_32K_XTAL:
timg_cali_clk_sel = 10;
break;
case CLK_CAL_LP_PLL:
timg_cali_clk_sel = 11;
break;
default:
// Unsupported CLK_CAL mux input
abort();
}
if (timg_cali_clk_sel >= 0) {
HP_SYS_CLKRST.peri_clk_ctrl21.reg_timergrp0_tgrt_clk_src_sel = timg_cali_clk_sel;
}
}
/**
* @brief Set a divider for the clock to be calibrated by timergroup0
*
* @param divider Divider. PRE_DIV_CNT = divider - 1.
*/
static inline __attribute__((always_inline)) void clk_ll_calibration_set_divider(uint32_t divider)
{
HAL_ASSERT(divider >= 1);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl21, reg_timergrp0_tgrt_clk_div_num, divider - 1);
}
/**
* @brief Select the clock source for RTC_SLOW_CLK
*