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feat(esp32c5): support esp32c5 g0 components

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This commit is contained in:
laokaiyao
2023-12-05 15:38:55 +08:00
parent 8eee6529dd
commit 2b44d62e43
47 changed files with 5498 additions and 302 deletions
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2
components/soc/esp32h2/include/soc/interrupts.h
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@@ -51,7 +51,7 @@ typedef enum {
ETS_UART0_INTR_SOURCE, /**< interrupt of UART0, level*/
ETS_UART1_INTR_SOURCE, /**< interrupt of UART1, level*/
ETS_LEDC_INTR_SOURCE, /**< interrupt of LED PWM, level*/
ETS_TWAI0_INTR_SOURCE, /**< interrupt of can0, level*/
ETS_TWAI0_INTR_SOURCE, /**< interrupt of twai0, level*/
ETS_USB_SERIAL_JTAG_INTR_SOURCE, /**< interrupt of USB, level*/
ETS_RMT_INTR_SOURCE, /**< interrupt of remote controller, level*/
ETS_I2C_EXT0_INTR_SOURCE, /**< interrupt of I2C controller0, level*/

5
components/soc/esp32h2/include/soc/soc_caps.h
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@@ -4,11 +4,6 @@
* SPDX-License-Identifier: Apache-2.0
*/
// The long term plan is to have a single soc_caps.h for each peripheral.
// During the refactoring and multichip support development process, we
// separate these information into periph_caps.h for each peripheral and
// include them here.
/*
* These defines are parsed and imported as kconfig variables via the script
* `tools/gen_soc_caps_kconfig/gen_soc_caps_kconfig.py`