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change(fpga): added bypass rng configuration

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This commit is contained in:
Armando
2023-12-05 10:42:19 +08:00
parent 4cd0a6a4b1
commit 2c32bd209a
19 changed files with 90 additions and 16 deletions
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4
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@@ -111,6 +111,10 @@ config SOC_SPI_FLASH_SUPPORTED
bool
default y
config SOC_RNG_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_26M
bool
default y

3
components/soc/esp32c2/include/soc/soc_caps.h
View File

@@ -48,7 +48,8 @@
#define SOC_CLK_TREE_SUPPORTED 1
#define SOC_ASSIST_DEBUG_SUPPORTED 1
#define SOC_WDT_SUPPORTED 1
#define SOC_SPI_FLASH_SUPPORTED 1
#define SOC_SPI_FLASH_SUPPORTED 1
#define SOC_RNG_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_26M 1