change(fpga): added bypass rng configuration

2025-08-27 18:32:54 +00:00 · 2023-12-05 10:42:19 +08:00
parent 4cd0a6a4b1
commit 2c32bd209a
19 changed files with 90 additions and 16 deletions
--- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
@@ -231,6 +231,10 @@ config SOC_SPI_FLASH_SUPPORTED
    bool
    default y

+config SOC_RNG_SUPPORTED
+    bool
+    default y
+
 config SOC_XTAL_SUPPORT_40M
    bool
    default y
--- a/components/soc/esp32s3/include/soc/soc_caps.h
+++ b/components/soc/esp32s3/include/soc/soc_caps.h
@@ -74,6 +74,7 @@
 #define SOC_MPU_SUPPORTED               1
 #define SOC_WDT_SUPPORTED               1
 #define SOC_SPI_FLASH_SUPPORTED         1
+#define SOC_RNG_SUPPORTED               1

 /*-------------------------- XTAL CAPS ---------------------------------------*/
 #define SOC_XTAL_SUPPORT_40M            1