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refactor(regi2c): ana i2c master clock is enabled per request
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -45,6 +45,9 @@ void bootloader_random_enable(void)
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SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
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SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
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// enable analog i2c master clock for RNG runtime
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ANALOG_CLOCK_ENABLE();
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// Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR , 0);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR , 1);
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@@ -93,6 +96,9 @@ void bootloader_random_disable(void)
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);
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// disable analog i2c master clock
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ANALOG_CLOCK_DISABLE();
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// disable ADC_CTRL_CLK (SAR ADC function clock)
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REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);
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