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https://github.com/espressif/esp-idf.git
synced 2025-08-10 04:43:33 +00:00
refactor(regi2c): ana i2c master clock is enabled per request
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@@ -128,7 +128,7 @@ static inline void adc_ll_digi_set_fsm_time(uint32_t rst_wait, uint32_t start_wa
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*/
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static inline void adc_ll_set_sample_cycle(uint32_t sample_cycle)
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{
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/* Peripheral reg i2c has powered up in rtc_init, write directly */
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/* Analog i2c master clock needs to be enabled for regi2c operations (done inside REGI2C_WRITE_MASK) */
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_SAMPLE_CYCLE_ADDR, sample_cycle);
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}
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@@ -19,20 +19,36 @@ extern "C" {
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/**
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* @brief Enable analog I2C master clock
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*/
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static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_enable_clock(bool en)
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static inline __attribute__((always_inline)) void _regi2c_ctrl_ll_master_enable_clock(bool en)
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{
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MODEM_LPCON.clk_conf.clk_i2c_mst_en = en;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
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#define regi2c_ctrl_ll_master_enable_clock(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _regi2c_ctrl_ll_master_enable_clock(__VA_ARGS__)
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/**
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* @brief Check whether analog I2C master clock is enabled
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*/
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static inline __attribute__((always_inline)) bool regi2c_ctrl_ll_master_is_clock_enabled(void)
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{
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return MODEM_LPCON.clk_conf.clk_i2c_mst_en;
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}
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/**
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* @brief Reset analog I2C master
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*/
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static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_reset(void)
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static inline __attribute__((always_inline)) void _regi2c_ctrl_ll_master_reset(void)
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{
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MODEM_LPCON.rst_conf.rst_i2c_mst = 1;
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MODEM_LPCON.rst_conf.rst_i2c_mst = 0;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
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#define regi2c_ctrl_ll_master_reset(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _regi2c_ctrl_ll_master_reset(__VA_ARGS__)
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/**
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* @brief Force enable analog I2C master clock
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*/
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