mirror of
https://github.com/espressif/esp-idf.git
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intr_alloc: split interrupt allocator into common-code and platform-code
esp_system: removed repeated interrupt allocator code and moved common code to esp_system xtens: moved xtensa specific code from freertos to the xtensa component hal/interrupt_controller: added interrupt controller hal and ll files docs: update the doxyfile with new location of esp_itr_alloc.h file xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos docs: removed Xtensa reference from intr_allocator api-reference xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer esp_system/test: fixed platform dependent setting for intr_allocator tests hal: rename the functions used to manage non iram interrupt mask.
This commit is contained in:
Felipe Neves
committed by
Angus Gratton
Angus Gratton
parent
59b763bb9a
commit
2e826b7a8f
356
components/esp_system/test/test_intr_alloc.c
Normal file
356
components/esp_system/test/test_intr_alloc.c
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@@ -0,0 +1,356 @@
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/*
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Tests for the interrupt allocator.
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*/
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#include <esp_types.h>
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#include <stdio.h>
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#include "esp_rom_sys.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "freertos/xtensa_api.h"
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#include "unity.h"
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#include "soc/uart_periph.h"
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#include "soc/dport_reg.h"
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#include "soc/gpio_periph.h"
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#include "esp_intr_alloc.h"
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#include "driver/periph_ctrl.h"
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#include "driver/timer.h"
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#include "sdkconfig.h"
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#define TIMER_DIVIDER 16 /*!< Hardware timer clock divider */
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#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
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#define TIMER_INTERVAL0_SEC (3.4179) /*!< test interval for timer 0 */
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#define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
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static void my_timer_init(int timer_group, int timer_idx, int ival)
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{
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timer_config_t config;
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config.alarm_en = 1;
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config.auto_reload = 1;
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config.counter_dir = TIMER_COUNT_UP;
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config.divider = TIMER_DIVIDER;
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config.intr_type = TIMER_INTR_LEVEL;
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config.counter_en = TIMER_PAUSE;
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/*Configure timer*/
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timer_init(timer_group, timer_idx, &config);
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/*Stop timer counter*/
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timer_pause(timer_group, timer_idx);
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/*Load counter value */
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timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
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/*Set alarm value*/
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timer_set_alarm_value(timer_group, timer_idx, ival);
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/*Enable timer interrupt*/
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timer_enable_intr(timer_group, timer_idx);
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}
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static volatile int count[4]={0,0,0,0};
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static void timer_isr(void *arg)
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{
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int timer_idx = (int)arg;
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count[timer_idx]++;
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if (timer_idx==0) {
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timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_0);
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timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_0);
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}
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if (timer_idx==1) {
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timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_1);
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timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_1);
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}
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if (timer_idx==2) {
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timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_0);
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timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_0);
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}
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if (timer_idx==3) {
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timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_1);
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timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_1);
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}
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}
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static void timer_test(int flags) {
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int x;
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timer_isr_handle_t inth[4];
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my_timer_init(TIMER_GROUP_0, TIMER_0, 110000);
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my_timer_init(TIMER_GROUP_0, TIMER_1, 120000);
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my_timer_init(TIMER_GROUP_1, TIMER_0, 130000);
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my_timer_init(TIMER_GROUP_1, TIMER_1, 140000);
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timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_isr, (void*)0, flags|ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
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timer_isr_register(TIMER_GROUP_0, TIMER_1, timer_isr, (void*)1, flags, &inth[1]);
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timer_isr_register(TIMER_GROUP_1, TIMER_0, timer_isr, (void*)2, flags, &inth[2]);
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timer_isr_register(TIMER_GROUP_1, TIMER_1, timer_isr, (void*)3, flags, &inth[3]);
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timer_start(TIMER_GROUP_0, TIMER_0);
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timer_start(TIMER_GROUP_0, TIMER_1);
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timer_start(TIMER_GROUP_1, TIMER_0);
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timer_start(TIMER_GROUP_1, TIMER_1);
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for (x=0; x<4; x++) count[x]=0;
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printf("Interrupts allocated: %d (dis) %d %d %d\n",
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esp_intr_get_intno(inth[0]), esp_intr_get_intno(inth[1]),
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esp_intr_get_intno(inth[2]), esp_intr_get_intno(inth[3]));
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printf("Timer values on start: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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TEST_ASSERT(count[0]==0);
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TEST_ASSERT(count[1]!=0);
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TEST_ASSERT(count[2]!=0);
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TEST_ASSERT(count[3]!=0);
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printf("Disabling timers 1 and 2...\n");
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esp_intr_enable(inth[0]);
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esp_intr_disable(inth[1]);
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esp_intr_disable(inth[2]);
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for (x=0; x<4; x++) count[x]=0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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TEST_ASSERT(count[0]!=0);
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TEST_ASSERT(count[1]==0);
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TEST_ASSERT(count[2]==0);
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TEST_ASSERT(count[3]!=0);
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printf("Disabling other half...\n");
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esp_intr_enable(inth[1]);
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esp_intr_enable(inth[2]);
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esp_intr_disable(inth[0]);
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esp_intr_disable(inth[3]);
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for (x=0; x<4; x++) count[x]=0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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TEST_ASSERT(count[0]==0);
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TEST_ASSERT(count[1]!=0);
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TEST_ASSERT(count[2]!=0);
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TEST_ASSERT(count[3]==0);
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printf("Done.\n");
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esp_intr_free(inth[0]);
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esp_intr_free(inth[1]);
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esp_intr_free(inth[2]);
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esp_intr_free(inth[3]);
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}
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static volatile int int_timer_ctr;
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void int_timer_handler(void *arg) {
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xthal_set_ccompare(1, xthal_get_ccount()+8000000);
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int_timer_ctr++;
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}
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void local_timer_test(void)
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{
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intr_handle_t ih;
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esp_err_t r;
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r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
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TEST_ASSERT(r==ESP_OK);
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printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
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xthal_set_ccompare(1, xthal_get_ccount()+8000000);
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int_timer_ctr=0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr!=0);
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printf("Disabling int\n");
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esp_intr_disable(ih);
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int_timer_ctr=0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr==0);
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printf("Re-enabling\n");
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esp_intr_enable(ih);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr!=0);
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printf("Free int, re-alloc disabled\n");
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r=esp_intr_free(ih);
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TEST_ASSERT(r==ESP_OK);
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r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
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TEST_ASSERT(r==ESP_OK);
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int_timer_ctr=0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr==0);
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printf("Re-enabling\n");
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esp_intr_enable(ih);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr!=0);
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r=esp_intr_free(ih);
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TEST_ASSERT(r==ESP_OK);
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printf("Done.\n");
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}
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TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
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{
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local_timer_test();
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}
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TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
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{
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timer_test(0);
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}
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TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
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{
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timer_test(ESP_INTR_FLAG_SHARED);
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}
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TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
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{
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void dummy(void* arg)
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{
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}
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IRAM_ATTR void dummy_iram(void* arg)
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{
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}
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RTC_IRAM_ATTR void dummy_rtc(void* arg)
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{
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}
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intr_handle_t ih;
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esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
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ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
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TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
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err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
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ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
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TEST_ESP_OK(err);
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err = esp_intr_free(ih);
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TEST_ESP_OK(err);
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err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
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ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
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TEST_ESP_OK(err);
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err = esp_intr_free(ih);
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TEST_ESP_OK(err);
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}
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#include "soc/spi_periph.h"
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typedef struct {
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bool flag1;
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bool flag2;
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bool flag3;
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bool flag4;
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} intr_alloc_test_ctx_t;
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void IRAM_ATTR int_handler1(void* arg)
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{
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intr_alloc_test_ctx_t* ctx=(intr_alloc_test_ctx_t*)arg;
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esp_rom_printf("handler 1 called.\n");
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if ( ctx->flag1 ) {
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ctx->flag3 = true;
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} else {
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ctx->flag1 = true;
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}
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#ifdef CONFIG_IDF_TARGET_ESP32
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SPI2.slave.trans_done = 0;
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#else
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GPSPI2.slave.trans_done = 0;
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#endif
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}
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void IRAM_ATTR int_handler2(void* arg)
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{
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intr_alloc_test_ctx_t* ctx = (intr_alloc_test_ctx_t*)arg;
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esp_rom_printf("handler 2 called.\n");
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if ( ctx->flag2 ) {
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ctx->flag4 = true;
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} else {
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ctx->flag2 = true;
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}
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}
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TEST_CASE("allocate 2 handlers for a same source and remove the later one","[intr_alloc]")
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{
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intr_alloc_test_ctx_t ctx = {false, false, false, false };
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intr_handle_t handle1, handle2;
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#ifdef CONFIG_IDF_TARGET_ESP32
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//enable HSPI(spi2)
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periph_module_enable(PERIPH_HSPI_MODULE);
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#else
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periph_module_enable(PERIPH_FSPI_MODULE);
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#endif
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esp_err_t r;
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r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
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TEST_ESP_OK(r);
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//try an invalid assign first
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r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, 0, int_handler2, NULL, &handle2);
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TEST_ASSERT_EQUAL_INT(r, ESP_ERR_NOT_FOUND );
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//assign shared then
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r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
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TEST_ESP_OK(r);
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#ifdef CONFIG_IDF_TARGET_ESP32
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SPI2.slave.trans_inten = 1;
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#else
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GPSPI2.slave.int_trans_done_en = 1;
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#endif
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printf("trigger first time.\n");
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#ifdef CONFIG_IDF_TARGET_ESP32
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SPI2.slave.trans_done = 1;
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#else
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GPSPI2.slave.trans_done = 1;
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#endif
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vTaskDelay(100);
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TEST_ASSERT( ctx.flag1 && ctx.flag2 );
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printf("remove intr 1.\n");
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r=esp_intr_free(handle2);
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printf("trigger second time.\n");
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#ifdef CONFIG_IDF_TARGET_ESP32
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SPI2.slave.trans_done = 1;
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#else
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GPSPI2.slave.trans_done = 1;
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#endif
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vTaskDelay(500);
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TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
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printf("test passed.\n");
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}
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#ifndef CONFIG_FREERTOS_UNICORE
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void isr_free_task(void *param)
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{
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esp_err_t ret = ESP_FAIL;
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intr_handle_t *test_handle = (intr_handle_t *)param;
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if(*test_handle != NULL) {
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ret = esp_intr_free(*test_handle);
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if(ret == ESP_OK) {
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*test_handle = NULL;
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}
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}
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vTaskDelete(NULL);
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}
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void isr_alloc_free_test(void)
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{
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intr_handle_t test_handle = NULL;
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esp_err_t ret = esp_intr_alloc(ETS_SPI2_INTR_SOURCE, 0, int_handler1, NULL, &test_handle);
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if(ret != ESP_OK) {
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printf("alloc isr handle fail\n");
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} else {
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printf("alloc isr handle on core %d\n",esp_intr_get_cpu(test_handle));
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}
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TEST_ASSERT(ret == ESP_OK);
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xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024*2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
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vTaskDelay(1000/portTICK_RATE_MS);
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TEST_ASSERT(test_handle == NULL);
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printf("test passed\n");
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}
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TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
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{
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isr_alloc_free_test();
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}
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#endif
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