refactor(spi_flash): Use new spi_flash register sturct and deperecate the old one

This commit is contained in:
Cao Sen Miao
2024-01-04 10:24:17 +08:00
parent 8325b507e0
commit 2e83fa1c69
28 changed files with 663 additions and 5241 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,16 +13,21 @@
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#include "hal/spi_flash_ll.h"
#include "rom/spi_flash.h"
#if CONFIG_IDF_TARGET_ESP32
# include "soc/spi_struct.h"
# include "soc/spi_reg.h"
/* SPI flash controller */
# define SPIFLASH SPI1
# define SPI0 SPI0
#else
# include "hal/spimem_flash_ll.h"
# include "soc/spi_mem_struct.h"
# include "soc/spi_mem_reg.h"
/* SPI flash controller */
# define SPIFLASH SPIMEM1
# define SPI0 SPIMEM0
#endif
// This dependency will be removed in the future. IDF-5025
@@ -581,10 +586,12 @@ IRAM_ATTR uint32_t bootloader_flash_execute_command_common(
uint32_t old_user_reg = SPIFLASH.user.val;
uint32_t old_user1_reg = SPIFLASH.user1.val;
uint32_t old_user2_reg = SPIFLASH.user2.val;
// Clear ctrl regs.
SPIFLASH.ctrl.val = 0;
#if CONFIG_IDF_TARGET_ESP32
SPIFLASH.ctrl.val = SPI_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
spi_flash_ll_set_wp_level(&SPIFLASH, true);
#else
SPIFLASH.ctrl.val = SPI_MEM_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
spimem_flash_ll_set_wp_level(&SPIFLASH, true);
#endif
//command phase
SPIFLASH.user.usr_command = 1;
@@ -634,6 +641,7 @@ IRAM_ATTR uint32_t bootloader_flash_execute_command_common(
//set unused bits to 0
ret &= ~(UINT32_MAX << miso_len);
}
esp_rom_printf("val is %x\n", SPIFLASH.ctrl.val);
return ret;
}
@@ -832,8 +840,8 @@ bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void)
esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void)
{
esp_rom_spiflash_read_mode_t spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
uint32_t spi_ctrl = spi_flash_ll_get_ctrl_val(&SPI0);
#if CONFIG_IDF_TARGET_ESP32
uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
if (spi_ctrl & SPI_FREAD_QIO) {
spi_mode = ESP_ROM_SPIFLASH_QIO_MODE;
} else if (spi_ctrl & SPI_FREAD_QUAD) {
@@ -848,7 +856,6 @@ esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void)
spi_mode = ESP_ROM_SPIFLASH_SLOWRD_MODE;
}
#else
uint32_t spi_ctrl = REG_READ(SPI_MEM_CTRL_REG(0));
if (spi_ctrl & SPI_MEM_FREAD_QIO) {
spi_mode = ESP_ROM_SPIFLASH_QIO_MODE;
} else if (spi_ctrl & SPI_MEM_FREAD_QUAD) {