ulp: Added ULP RISC-V support for esp32s3

This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
This commit is contained in:
Sudeep Mohanty
2021-12-23 11:42:47 +05:30
parent 90ad86e0d8
commit 2ed15d8b1e
27 changed files with 408 additions and 168 deletions

View File

@@ -1,20 +1,12 @@
// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* This file contains definitions that are common between esp32/ulp.h
and esp32s2/ulp.h
/* This file contains definitions that are common between esp32/ulp.h,
esp32s2/ulp.h and esp32s3/ulp.h
*/
#ifdef __cplusplus