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https://github.com/espressif/esp-idf.git
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driver: support I2S on ESP32-S3 & ESP32-C3
1. refactor I2S driver. 2. support TDM mode for esp2s3 & esp32c3.
This commit is contained in:
houwenxiang
@@ -1,4 +1,4 @@
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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@@ -39,19 +39,148 @@ extern "C" {
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#define I2S_INTR_OUT_DSCR_ERR BIT(14)
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#define I2S_INTR_MAX (0xFFFFFFFF)
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/* I2S clock configuration structure */
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typedef struct {
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uint16_t mclk_div; // I2S module clock devider, Fmclk = Fsclk /(mclk_div+b/a)
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uint16_t a;
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uint16_t b; // The decimal part of module clock devider, the decimal is: b/a
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uint16_t bck_div; // The BCK devider, Fbck = Fmclk / bck_div
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} i2s_clk_cal_t;
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/**
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* @brief Reset rx fifo
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* @brief Calculate the closest sample rate clock configuration.
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* clock relationship:
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* Fmclk = bck_div*fbck = fsclk/(mclk_div+b/a)
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param fsclk I2S source clock freq.
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* @param fbck BCK freuency.
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* @param bck_div The BCK devider of bck. Generally, set bck_div to 8.
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* @param cal Point to `i2s_clk_cal_t` structure.
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*/
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static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
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static inline void i2s_ll_clk_cal(uint32_t fsclk, uint32_t fbck, int bck_div, i2s_clk_cal_t *cal)
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{
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hw->conf.rx_fifo_reset = 1;
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hw->conf.rx_fifo_reset = 0;
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int ma = 0;
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int mb = 0;
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uint32_t mclk = fbck*bck_div;
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cal->mclk_div = fsclk / mclk;
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cal->bck_div = bck_div;
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cal->a = 1;
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cal->b = 0;
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uint32_t freq_diff = fsclk - mclk * cal->mclk_div;
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uint32_t min = ~0;
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if (freq_diff == 0) {
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return;
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}
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for (int a = 2; a <= 63; a++) {
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for (int b = 1; b < a; b++) {
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ma = freq_diff*a;
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mb = mclk*b;
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if (ma == mb) {
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cal->a = a;
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cal->b = b;
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return;
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}
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if (abs((mb - ma)) < min) {
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cal->a = a;
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cal->b = b;
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min = abs(mb - ma);
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}
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}
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}
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}
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/**
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* @brief Reset tx fifo
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* @brief I2S module general init, enable I2S clock.
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_general_init(i2s_dev_t *hw)
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{
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if (hw->clkm_conf.clk_en == 0) {
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hw->clkm_conf.clk_sel = 2;
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hw->clkm_conf.clk_en = 1;
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hw->conf2.val = 0;
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}
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}
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/**
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* @brief I2S TX module general init.
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_tx_gen_init(i2s_dev_t *hw)
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{
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hw->conf.tx_start = 0;
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hw->conf.tx_reset = 1;
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hw->conf.tx_reset = 0;
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hw->conf.tx_msb_right = 0;
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hw->conf.tx_right_first = 0;
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hw->conf.tx_slave_mod = 0;
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hw->fifo_conf.tx_fifo_mod_force_en = 1;
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}
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/**
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* @brief I2S RX module general init.
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_rx_gen_init(i2s_dev_t *hw)
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{
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hw->conf.rx_start = 0;
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hw->conf.rx_reset = 1;
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hw->conf.rx_reset = 0;
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hw->conf.rx_msb_right = 0;
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hw->conf.rx_right_first = 0;
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hw->conf.rx_slave_mod = 0;
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hw->fifo_conf.rx_fifo_mod_force_en = 1;
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}
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/**
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* @brief Enable I2S TX slave mode
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param slave_en Set true to enable slave mode
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*/
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static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, bool slave_en)
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{
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hw->conf.tx_slave_mod = slave_en;
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}
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/**
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* @brief Enable I2S RX slave mode
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param slave_en Set true to enable slave mode
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*/
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static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, bool slave_en)
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{
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hw->conf.rx_slave_mod = slave_en;
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}
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/**
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* @brief Reset TX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
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{
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hw->conf.tx_reset = 1;
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hw->conf.tx_reset = 0;
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}
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/**
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* @brief Reset RX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
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{
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hw->conf.rx_reset = 1;
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hw->conf.rx_reset = 0;
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}
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/**
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* @brief Reset TX FIFO
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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@@ -62,40 +191,68 @@ static inline void i2s_ll_reset_tx_fifo(i2s_dev_t *hw)
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}
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/**
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* @brief Enable rx interrupt
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* @brief Reset RX FIFO
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
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static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
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{
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hw->int_ena.in_suc_eof = 1;
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hw->int_ena.in_dscr_err = 1;
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hw->conf.rx_fifo_reset = 1;
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hw->conf.rx_fifo_reset = 0;
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}
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/**
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* @brief Disable rx interrupt
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* @brief Set TX source clock
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param src I2S source clock
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*/
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static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
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static inline void i2s_ll_set_tx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
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{
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hw->int_ena.in_suc_eof = 0;
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hw->int_ena.in_dscr_err = 0;
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hw->clkm_conf.clk_sel = (src == 1) ? 1 : 2;
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}
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/**
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* @brief Disable tx interrupt
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* @brief Set RX source clock
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param src I2S source clock
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*/
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static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
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static inline void i2s_ll_set_rx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
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{
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hw->int_ena.out_eof = 0;
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hw->int_ena.out_dscr_err = 0;
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hw->clkm_conf.clk_sel = (src == 1) ? 1 : 2;
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}
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/**
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* @brief Enable tx interrupt
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* @brief Configure I2S TX clock devider
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param set Pointer to I2S clock devider configuration paramater
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*/
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static inline void i2s_ll_set_tx_clk(i2s_dev_t *hw, i2s_clk_cal_t *set)
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{
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hw->clkm_conf.clkm_div_num = set->mclk_div;
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hw->clkm_conf.clkm_div_b = set->b;
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hw->clkm_conf.clkm_div_a = set->a;
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hw->sample_rate_conf.tx_bck_div_num = set->bck_div;
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}
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/**
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* @brief Configure I2S RX clock devider
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param set Pointer to I2S clock devider configuration paramater
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*/
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static inline void i2s_ll_set_rx_clk(i2s_dev_t *hw, i2s_clk_cal_t *set)
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{
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hw->clkm_conf.clkm_div_num = set->mclk_div;
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hw->clkm_conf.clkm_div_b = set->b;
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hw->clkm_conf.clkm_div_a = set->a;
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hw->sample_rate_conf.rx_bck_div_num = set->bck_div;
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}
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/**
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* @brief Enable TX interrupt
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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@@ -106,14 +263,58 @@ static inline void i2s_ll_enable_tx_intr(i2s_dev_t *hw)
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}
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/**
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* @brief Reset dma in
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* @brief Disable TX interrupt
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_reset_dma_in(i2s_dev_t *hw)
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static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
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{
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hw->lc_conf.in_rst = 1;
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hw->lc_conf.in_rst = 0;
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hw->int_ena.out_eof = 0;
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hw->int_ena.out_dscr_err = 0;
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}
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/**
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* @brief Enable RX interrupt
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
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{
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hw->int_ena.in_suc_eof = 1;
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hw->int_ena.in_dscr_err = 1;
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}
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/**
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* @brief Disable RX interrupt
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
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{
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hw->int_ena.in_suc_eof = 0;
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hw->int_ena.in_dscr_err = 0;
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}
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/**
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* @brief Get I2S interrupt status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param intr_mask Pointer to accept interrupt status
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*/
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static inline void i2s_ll_get_intr_status(i2s_dev_t *hw, uint32_t *intr_mask)
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{
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*intr_mask = hw->int_st.val;
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}
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/**
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* @brief Clear I2S interrupt status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param clr_mask Interrupt mask to be cleared.
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*/
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static inline void i2s_ll_clear_intr_status(i2s_dev_t *hw, uint32_t clr_mask)
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{
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hw->int_clr.val = clr_mask;
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}
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/**
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@@ -128,39 +329,18 @@ static inline void i2s_ll_reset_dma_out(i2s_dev_t *hw)
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}
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/**
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* @brief Reset tx
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* @brief Reset dma in
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
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static inline void i2s_ll_reset_dma_in(i2s_dev_t *hw)
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{
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hw->conf.tx_reset = 1;
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hw->conf.tx_reset = 0;
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hw->lc_conf.in_rst = 1;
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hw->lc_conf.in_rst = 0;
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}
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/**
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* @brief Reset rx
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
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{
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hw->conf.rx_reset = 1;
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hw->conf.rx_reset = 0;
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}
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/**
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* @brief Start out link
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_start_out_link(i2s_dev_t *hw)
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{
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hw->out_link.start = 1;
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}
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/**
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* @brief Start tx
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* @brief Start TX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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@@ -170,17 +350,7 @@ static inline void i2s_ll_start_tx(i2s_dev_t *hw)
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}
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/**
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* @brief Start in link
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_start_in_link(i2s_dev_t *hw)
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{
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hw->in_link.start = 1;
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}
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/**
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* @brief Start rx
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* @brief Start RX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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@@ -189,6 +359,50 @@ static inline void i2s_ll_start_rx(i2s_dev_t *hw)
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hw->conf.rx_start = 1;
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}
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/**
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* @brief Configure TX DMA descriptor address and start TX DMA
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param link_addr DMA descriptor link address.
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*/
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static inline void i2s_ll_start_tx_link(i2s_dev_t *hw, uint32_t link_addr)
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{
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hw->out_link.addr = link_addr;
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hw->out_link.start = 1;
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}
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/**
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* @brief Configure RX DMA descriptor address and start TX DMA
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param link_addr DMA descriptor link address.
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*/
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static inline void i2s_ll_start_rx_link(i2s_dev_t *hw, uint32_t link_addr)
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{
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hw->in_link.addr = link_addr;
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hw->in_link.start = 1;
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}
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/**
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* @brief Stop TX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
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{
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hw->conf.tx_start = 0;
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}
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/**
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* @brief Stop RX module
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
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{
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hw->conf.rx_start = 0;
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}
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/**
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* @brief Stop out link
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*
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@@ -199,16 +413,6 @@ static inline void i2s_ll_stop_out_link(i2s_dev_t *hw)
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hw->out_link.stop = 1;
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}
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/**
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* @brief Stop tx
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*
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* @param hw Peripheral I2S hardware instance address.
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*/
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static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
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{
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hw->conf.tx_start = 0;
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}
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/**
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* @brief Stop in link
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*
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@@ -220,456 +424,77 @@ static inline void i2s_ll_stop_in_link(i2s_dev_t *hw)
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}
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/**
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* @brief Stop rx
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* @brief Get I2S out eof descriptor address
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param eof_addr Pointer to accept out eof des address
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*/
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static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
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static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
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{
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hw->conf.rx_start = 0;
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*eof_addr = hw->out_eof_des_addr;
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}
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/**
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* @brief Enable dma
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* @brief Get I2S in eof descriptor address
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param eof_addr Pointer to accept in eof des address
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*/
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static inline void i2s_ll_enable_dma(i2s_dev_t *hw)
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static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
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{
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//Enable and configure DMA
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typeof(hw->lc_conf) lc_conf;
|
||||
lc_conf.val = 0;
|
||||
lc_conf.out_eof_mode = 1;
|
||||
hw->lc_conf.val = lc_conf.val;
|
||||
*eof_addr = hw->in_eof_des_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S interrupt status
|
||||
* @brief Configure the received length to trigger in_suc_eof interrupt
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get interrupt status
|
||||
* @param eof_num the byte length to trigger in_suc_eof interrupt
|
||||
*/
|
||||
static inline void i2s_ll_get_intr_status(i2s_dev_t *hw, uint32_t *val)
|
||||
static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, uint32_t eof_num)
|
||||
{
|
||||
*val = hw->int_st.val;
|
||||
hw->rx_eof_num = eof_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear I2S interrupt status
|
||||
* @brief Congfigure TX slot bit and audio data bit, on ESP32-S2, sample_bit should equals to data_bit
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to clear interrupt status
|
||||
* @param sample_bit The slot bit width
|
||||
* @param data_bit The audio data bit width
|
||||
*/
|
||||
static inline void i2s_ll_clear_intr_status(i2s_dev_t *hw, uint32_t val)
|
||||
static inline void i2s_ll_set_tx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
|
||||
{
|
||||
hw->int_clr.val = val;
|
||||
hw->fifo_conf.tx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
|
||||
hw->sample_rate_conf.tx_bits_mod = data_bit;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S out eof des address
|
||||
* @brief Congfigure RX slot bit and audio data bit, on ESP32-S2, sample_bit should equals to data_bit
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get out eof des address
|
||||
* @param sample_bit The slot bit width
|
||||
* @param data_bit The audio data bit width
|
||||
*/
|
||||
static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *val)
|
||||
static inline void i2s_ll_set_rx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
|
||||
{
|
||||
*val = hw->out_eof_des_addr;
|
||||
hw->fifo_conf.rx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
|
||||
hw->sample_rate_conf.rx_bits_mod = data_bit;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S in eof des address
|
||||
* @brief Enable I2S DMA
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get in eof des address
|
||||
* @param ena Set true to enable DMA
|
||||
*/
|
||||
static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *val)
|
||||
static inline void i2s_ll_dma_enable(i2s_dev_t *hw, bool ena)
|
||||
{
|
||||
*val = hw->in_eof_des_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S tx fifo mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get tx fifo mode
|
||||
*/
|
||||
static inline void i2s_ll_get_tx_fifo_mod(i2s_dev_t *hw, uint32_t *val)
|
||||
{
|
||||
*val = hw->fifo_conf.tx_fifo_mod;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx fifo mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx fifo mode
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_fifo_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->fifo_conf.tx_fifo_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S rx fifo mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get rx fifo mode
|
||||
*/
|
||||
static inline void i2s_ll_get_rx_fifo_mod(i2s_dev_t *hw, uint32_t *val)
|
||||
{
|
||||
*val = hw->fifo_conf.rx_fifo_mod;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx fifo mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx fifo mode
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_fifo_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->fifo_conf.rx_fifo_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx chan mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx chan mode
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_chan_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf_chan.tx_chan_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx chan mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx chan mode
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_chan_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf_chan.rx_chan_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx dma equal
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx dma equal
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_dma_equal(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.tx_dma_equal = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx dma equal
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx dma equal
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_dma_equal(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.rx_dma_equal = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S out link address
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set out link address
|
||||
*/
|
||||
static inline void i2s_ll_set_out_link_addr(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->out_link.addr = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S in link address
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set in link address
|
||||
*/
|
||||
static inline void i2s_ll_set_in_link_addr(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->in_link.addr = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx eof num
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx eof num
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->rx_eof_num = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S clkm div num
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set clkm div num
|
||||
*/
|
||||
static inline void i2s_ll_set_clkm_div_num(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->clkm_conf.clkm_div_num = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S clkm div b
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set clkm div b
|
||||
*/
|
||||
static inline void i2s_ll_set_clkm_div_b(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->clkm_conf.clkm_div_b = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S clkm div a
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set clkm div a
|
||||
*/
|
||||
static inline void i2s_ll_set_clkm_div_a(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->clkm_conf.clkm_div_a = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx bck div num
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx bck div num
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_bck_div_num(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->sample_rate_conf.tx_bck_div_num = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx bck div num
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx bck div num
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_bck_div_num(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->sample_rate_conf.rx_bck_div_num = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S clk sel
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set clk sel
|
||||
*/
|
||||
static inline void i2s_ll_set_clk_sel(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->clkm_conf.clk_sel = (val == 1) ? 1 : 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx bits mod
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx bits mod
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_bits_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->sample_rate_conf.tx_bits_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx bits mod
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx bits mod
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_bits_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->sample_rate_conf.rx_bits_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S dscr en
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set dscr en
|
||||
*/
|
||||
static inline void i2s_ll_set_dscr_en(i2s_dev_t *hw, bool val)
|
||||
{
|
||||
hw->fifo_conf.dscr_en = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S lcd en
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set lcd en
|
||||
*/
|
||||
static inline void i2s_ll_set_lcd_en(i2s_dev_t *hw, bool val)
|
||||
{
|
||||
hw->conf2.lcd_en = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S camera en
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set camera en
|
||||
*/
|
||||
static inline void i2s_ll_set_camera_en(i2s_dev_t *hw, bool val)
|
||||
{
|
||||
hw->conf2.camera_en = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx fifo mod force en
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx fifo mod force en
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_fifo_mod_force_en(i2s_dev_t *hw, bool val)
|
||||
{
|
||||
hw->fifo_conf.tx_fifo_mod_force_en = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx fifo mod force en
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx fifo mod force en
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_fifo_mod_force_en(i2s_dev_t *hw, bool val)
|
||||
{
|
||||
hw->fifo_conf.rx_fifo_mod_force_en = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx right first
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx right first
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_right_first(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.tx_right_first = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx right first
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx right first
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_right_first(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.rx_right_first = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx slave mod
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx slave mod
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.tx_slave_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx slave mod
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx slave mod
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.rx_slave_mod = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S tx msb right
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get tx msb right
|
||||
*/
|
||||
static inline void i2s_ll_get_tx_msb_right(i2s_dev_t *hw, uint32_t *val)
|
||||
{
|
||||
*val = hw->conf.tx_msb_right;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get I2S rx msb right
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to get rx msb right
|
||||
*/
|
||||
static inline void i2s_ll_get_rx_msb_right(i2s_dev_t *hw, uint32_t *val)
|
||||
{
|
||||
*val = hw->conf.rx_msb_right;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx msb right
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx msb right
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_msb_right(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.tx_msb_right = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx msb right
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx msb right
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_msb_right(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.rx_msb_right = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S tx mono
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set tx mono
|
||||
*/
|
||||
static inline void i2s_ll_set_tx_mono(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.tx_mono = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S rx mono
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set rx mono
|
||||
*/
|
||||
static inline void i2s_ll_set_rx_mono(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.rx_mono = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set I2S sig loopback
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param val value to set sig loopback
|
||||
*/
|
||||
static inline void i2s_ll_set_sig_loopback(i2s_dev_t *hw, uint32_t val)
|
||||
{
|
||||
hw->conf.sig_loopback = val;
|
||||
if (ena && !hw->fifo_conf.dscr_en) {
|
||||
hw->fifo_conf.dscr_en = 1;
|
||||
} else if (!ena && hw->fifo_conf.dscr_en) {
|
||||
hw->fifo_conf.dscr_en = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -760,6 +585,53 @@ static inline void i2s_ll_set_rx_pcm_long(i2s_dev_t *hw)
|
||||
hw->conf.rx_msb_shift = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable TX mono mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param mono_ena Set true to enable mono mde.
|
||||
*/
|
||||
static inline void i2s_ll_tx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
|
||||
{
|
||||
int data_bit = hw->sample_rate_conf.tx_bits_mod;
|
||||
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
|
||||
hw->fifo_conf.tx_fifo_mod = 0 + mono_ena;
|
||||
} else {
|
||||
hw->fifo_conf.tx_fifo_mod = 2 + mono_ena;
|
||||
}
|
||||
hw->conf.tx_dma_equal = mono_ena;
|
||||
hw->conf_chan.tx_chan_mod = mono_ena;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable RX mono mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param mono_ena Set true to enable mono mde.
|
||||
*/
|
||||
static inline void i2s_ll_rx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
|
||||
{
|
||||
int data_bit = hw->sample_rate_conf.rx_bits_mod;
|
||||
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
|
||||
hw->fifo_conf.rx_fifo_mod = 0 + mono_ena;
|
||||
} else {
|
||||
hw->fifo_conf.rx_fifo_mod = 2 + mono_ena;
|
||||
}
|
||||
hw->conf.rx_dma_equal = mono_ena;
|
||||
hw->conf_chan.rx_chan_mod = mono_ena;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable I2S loopback mode
|
||||
*
|
||||
* @param hw Peripheral I2S hardware instance address.
|
||||
* @param loopback_en Set true to enable loopback mode.
|
||||
*/
|
||||
static inline void i2s_ll_loop_back_ena(i2s_dev_t *hw, bool loopback_en)
|
||||
{
|
||||
hw->conf.sig_loopback = loopback_en;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user