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driver: support I2S on ESP32-S3 & ESP32-C3

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1. refactor I2S driver.
  2. support TDM mode for esp2s3 & esp32c3.
This commit is contained in:
houwenxiang
2020-06-01 09:47:48 +08:00
committed by laokaiyao
parent 12c76b4c5c
commit 2f1247e1c4
29 changed files with 2929 additions and 3076 deletions
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30
components/soc/esp32s3/i2s_periph.c
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@@ -1,4 +1,4 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -20,17 +20,23 @@
*/
const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_NUM] = {
{
.o_bck_in_sig = I2S0O_BCK_IN_IDX,
.o_ws_in_sig = I2S0O_WS_IN_IDX,
.o_bck_out_sig = I2S0O_BCK_OUT_IDX,
.o_ws_out_sig = I2S0O_WS_OUT_IDX,
.o_data_out_sig = I2S0O_SD_OUT_IDX,
.i_bck_in_sig = I2S0I_BCK_OUT_IDX,
.i_ws_in_sig = I2S0I_WS_OUT_IDX,
.i_bck_out_sig = I2S0I_BCK_IN_IDX,
.i_ws_out_sig = I2S0I_WS_IN_IDX,
.i_data_in_sig = I2S0I_SD_IN_IDX,
.irq = ETS_I2S0_INTR_SOURCE,
.rx_bck_sig = I2S0I_BCK_IN_IDX,
.tx_bck_sig = I2S0O_BCK_OUT_IDX,
.tx_ws_sig = I2S0O_WS_OUT_IDX,
.rx_ws_sig = I2S0I_WS_IN_IDX,
.data_out_sig = I2S0O_SD_OUT_IDX,
.data_in_sig = I2S0I_SD_IN_IDX,
.irq = ETS_DMA_CH0_INTR_SOURCE,
.module = PERIPH_I2S0_MODULE,
},
{
.rx_bck_sig = I2S1I_BCK_IN_IDX,
.tx_bck_sig = I2S1O_BCK_OUT_IDX,
.tx_ws_sig = I2S1O_WS_OUT_IDX,
.rx_ws_sig = I2S1I_WS_IN_IDX,
.data_out_sig = I2S1O_SD_OUT_IDX,
.data_in_sig = I2S1I_SD_IN_IDX,
.irq = ETS_DMA_CH3_INTR_SOURCE,
.module = PERIPH_I2S1_MODULE,
}
};

23
components/soc/esp32s3/include/soc/i2s_caps.h
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@@ -1,23 +0,0 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#define SOC_I2S_APLL_MIN_FREQ (250000000)
#define SOC_I2S_APLL_MAX_FREQ (500000000)
#define SOC_I2S_APLL_MIN_RATE (10675) //in Hz, I2S Clock rate limited by hardware
#define SOC_I2S_MAX_BUFFER_SIZE (4 * 1024 * 1024) //the maximum RAM can be allocated
// ESP32-S3 have 1 I2S
#define SOC_I2S_NUM (1)

7
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -63,7 +63,12 @@
#include "i2c_caps.h"
/*-------------------------- I2S CAPS ----------------------------------------*/
#include "i2s_caps.h"
#define SOC_I2S_NUM (2)
#define SOC_I2S_SUPPORTS_PCM (1)
#define SOC_I2S_SUPPORTS_PDM_TX (0)
#define SOC_I2S_SUPPORTS_PDM_RX (1)
#define SOC_I2S_SUPPORTS_PDM (1) //(SOC_I2S_SUPPORTS_PDM_RX | SOC_I2S_SUPPORTS_PDM_TX)
#define SOC_I2S_SUPPORTS_TDM (1)
/*-------------------------- LEDC CAPS ---------------------------------------*/
#include "ledc_caps.h"

1
components/soc/esp32s3/ld/esp32s3.peripherals.ld
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@@ -8,6 +8,7 @@ PROVIDE ( RTCIO = 0x60008400 );
PROVIDE ( SENS = 0x60008800 );
PROVIDE ( HINF = 0x6000B000 );
PROVIDE ( I2S0 = 0x6000F000 );
PROVIDE ( I2S1 = 0x6002D000 );
PROVIDE ( UART1 = 0x60010000 );
PROVIDE ( I2C0 = 0x60013000 );
PROVIDE ( UHCI0 = 0x60014000 );