mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-09 20:41:14 +00:00
Merge wifi branch commit '588d384393536a040f899b382890316c56061b6a' into feature/wifi-stage-one
This commit is contained in:
Angus Gratton
@@ -32,6 +32,7 @@ typedef enum {
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SYSTEM_EVENT_STA_CONNECTED, /**< ESP32 station connected to AP */
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SYSTEM_EVENT_STA_DISCONNECTED, /**< ESP32 station disconnected to AP */
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SYSTEM_EVENT_STA_AUTHMODE_CHANGE, /**< the auth mode of AP connected by ESP32 station changed */
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SYSTEM_EVENT_STA_GOTIP,
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SYSTEM_EVENT_AP_START, /**< ESP32 softap start */
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SYSTEM_EVENT_AP_STOP, /**< ESP32 softap start */
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SYSTEM_EVENT_AP_STACONNECTED, /**< a station connected to ESP32 soft-AP */
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@@ -40,6 +41,10 @@ typedef enum {
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SYSTEM_EVENT_MAX
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} system_event_id_t;
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typedef struct {
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uint32_t addr;
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} esp_ip_addr_t;
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typedef struct {
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uint32_t status; /**< status of scanning APs*/
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uint8_t number;
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@@ -64,6 +69,12 @@ typedef struct {
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uint8_t new_mode; /**< the new auth mode of AP */
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} system_event_sta_authmode_change_t;
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typedef struct {
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esp_ip_addr_t ip;
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esp_ip_addr_t netmask;
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esp_ip_addr_t gw;
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} system_event_sta_gotip_t;
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typedef struct {
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uint8_t mac[6]; /**< MAC address of the station connected to ESP32 soft-AP */
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uint8_t aid; /**< the aid that ESP32 soft-AP gives to the station connected to */
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@@ -84,6 +95,7 @@ typedef union {
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system_event_sta_disconnected_t disconnected; /**< ESP32 station disconnected to AP */
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system_event_sta_scan_done_t scan_done; /**< ESP32 station scan (APs) done */
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system_event_sta_authmode_change_t auth_change; /**< the auth mode of AP ESP32 station connected to changed */
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system_event_sta_gotip_t got_ip;
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system_event_ap_staconnected_t sta_connected; /**< a station connected to ESP32 soft-AP */
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system_event_ap_stadisconnected_t sta_disconnected; /**< a station disconnected to ESP32 soft-AP */
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system_event_ap_probe_req_rx_t ap_probereqrecved; /**< ESP32 softAP receive probe request packet */
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209
components/esp32/include/esp_intr.h
Normal file
209
components/esp32/include/esp_intr.h
Normal file
@@ -0,0 +1,209 @@
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// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __ESP_INTR_H__
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#define __ESP_INTR_H__
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#include "rom/ets_sys.h"
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#include "freertos/xtensa_api.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ESP_CCOMPARE_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_CCOMPARE_INUM, (func), (void *)(arg))
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#define ESP_EPWM_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_EPWM_INUM, (func), (void *)(arg))
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#define ESP_MPWM_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_MPWM_INUM, (func), (void *)(arg))
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#define ESP_SPI1_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI1_INUM, (func), (void *)(arg))
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#define ESP_SPI2_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI2_INUM, (func), (void *)(arg))
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#define ESP_SPI3_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI3_INUM, (func), (void *)(arg))
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#define ESP_I2S0_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_I2S0_INUM, (func), (void *)(arg))
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#define ESP_PCNT_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_PCNT_INUM, (func), (void *)(arg))
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#define ESP_LEDC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_LEDC_INUM, (func), (void *)(arg))
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#define ESP_WMAC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_WMAC_INUM, (func), (void *)(arg))
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#define ESP_FRC_TIMER1_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_FRC_TIMER1_INUM, (func), (void *)(arg))
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#define ESP_FRC_TIMER2_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_FRC_TIMER2_INUM, (func), (void *)(arg))
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#define ESP_GPIO_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_GPIO_INUM, (func), (void *)(arg))
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#define ESP_UART_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_UART_INUM, (func), (void *)(arg))
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#define ESP_WDT_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_WDT_INUM, (func), (void *)(arg))
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#define ESP_RTC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_RTC_INUM, (func), (void *)(arg))
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#define ESP_SLC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SLC_INUM, (func), (void *)(arg))
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#define ESP_RMT_CTRL_INTRL(func,arg)\
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xt_set_interrupt_handler(ETS_RMT_CTRL_INUM, (func), (void *)(arg))
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#define ESP_INTR_ENABLE(inum) \
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xt_ints_on((1<<inum))
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#define ESP_INTR_DISABLE(inum) \
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xt_ints_off((1<<inum))
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#define ESP_CCOMPARE_INTR_ENBALE() \
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ESP_INTR_ENABLE(ETS_CCOMPARE_INUM)
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#define ESP_CCOMPARE_INTR_DISBALE() \
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ESP_INTR_DISABLE(ETS_CCOMPARE_INUM)
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#define ESP_SPI1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI1_INUM)
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#define ESP_SPI1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI1_INUM)
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#define ESP_SPI2_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI2_INUM)
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#define ESP_PWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_PWM_INUM)
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#define ESP_PWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_PWM_INUM)
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#define ESP_SPI2_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI2_INUM)
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#define ESP_SPI3_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI3_INUM)
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#define ESP_SPI3_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI3_INUM)
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#define ESP_I2S0_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_I2S0_INUM)
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#define ESP_I2S0_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_I2S0_INUM)
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#define ESP_I2S1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_I2S1_INUM)
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#define ESP_I2S1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_I2S1_INUM)
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#define ESP_MPWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_MPWM_INUM)
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#define ESP_EPWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_EPWM_INUM)
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#define ESP_MPWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_MPWM_INUM)
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#define ESP_EPWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_EPWM_INUM)
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#define ESP_BB_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_BB_INUM)
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#define ESP_BB_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_BB_INUM)
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#define ESP_UART_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_UART_INUM)
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#define ESP_UART_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_UART_INUM)
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#define ESP_LEDC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_LEDC_INUM)
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#define ESP_LEDC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_LEDC_INUM)
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#define ESP_GPIO_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_GPIO_INUM)
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#define ESP_GPIO_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_GPIO_INUM)
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#define ESP_WDT_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_WDT_INUM)
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#define ESP_WDT_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_WDT_INUM)
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#define ESP_FRC1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
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#define ESP_FRC1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
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#define ESP_FRC2_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_FRC_TIMER2_INUM)
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#define ESP_FRC2_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_FRC_TIMER2_INUM)
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#define ESP_RTC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_RTC_INUM)
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#define ESP_RTC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_RTC_INUM)
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#define ESP_SLC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SLC_INUM)
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#define ESP_SLC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SLC_INUM)
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#define ESP_PCNT_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_PCNT_INUM)
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#define ESP_PCNT_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_PCNT_INUM)
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#define ESP_RMT_CTRL_ENABLE() \
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ESP_INTR_ENABLE(ETS_RMT_CTRL_INUM)
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#define ESP_RMT_CTRL_DIABLE() \
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ESP_INTR_DISABLE(ETS_RMT_CTRL_INUM)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ESP_INTR_H__ */
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@@ -17,6 +17,8 @@
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#include <stdint.h>
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -84,15 +86,6 @@ void system_deep_sleep(uint64_t time_in_us);
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*/
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uint32_t system_get_time(void);
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|
||||
/**
|
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* @brief Print the system memory distribution, including data/rodata/bss/heap.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return null
|
||||
*/
|
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void system_print_meminfo(void);
|
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|
||||
/**
|
||||
* @brief Get the size of available heap.
|
||||
*
|
||||
@@ -102,22 +95,6 @@ void system_print_meminfo(void);
|
||||
*/
|
||||
uint32_t system_get_free_heap_size(void);
|
||||
|
||||
/**
|
||||
* @brief Get the chip ID.
|
||||
*
|
||||
* Example:
|
||||
* <pre>
|
||||
* uint8 chip_id[6];
|
||||
* system_get_chip_id(chip_id);
|
||||
* </pre>
|
||||
*
|
||||
* @param uint8 *chip_id : the chip ID
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_get_chip_id(uint8_t *chip_id);
|
||||
|
||||
/**
|
||||
* @brief Get RTC time, unit: RTC clock cycle.
|
||||
*
|
||||
@@ -171,98 +148,6 @@ bool system_rtc_mem_read(uint16_t src, void *dst, uint16_t n);
|
||||
*/
|
||||
bool system_rtc_mem_write(uint16_t dst, const void *src, uint16_t n);
|
||||
|
||||
typedef enum {
|
||||
ADC1_PAD_GPIO36 = 0,
|
||||
ADC1_PAD_GPIO37,
|
||||
ADC1_PAD_GPIO38,
|
||||
ADC1_PAD_GPIO39,
|
||||
ADC1_PAD_GPIO32,
|
||||
ADC1_PAD_GPIO33,
|
||||
ADC1_PAD_GPIO34,
|
||||
ADC1_PAD_GPIO35
|
||||
} adc1_read_pad_t;
|
||||
|
||||
typedef enum {
|
||||
ADC1_ATTEN_0DB = 0,
|
||||
ADC1_ATTEN_3DB,
|
||||
ADC1_ATTEN_6DB,
|
||||
ADC1_ATTEN_12DB
|
||||
} adc1_read_atten_t;
|
||||
|
||||
/**
|
||||
* @brief Read ADC1.
|
||||
*
|
||||
* @param adc1_read_pad pad : the corresponding GPIO
|
||||
* @param adc1_read_atten atten : value of attenuation
|
||||
*
|
||||
* @return range of the return value is [0, 4096].
|
||||
* - If atten == 0, the range of voltage can be measured is [0, 1] V.
|
||||
* - If atten == 1, the range of voltage can be measured is [0, 1.4] V.
|
||||
* - If atten == 2, the range of voltage can be measured is [0, 2] V.
|
||||
* - If atten == 3, the range of voltage can be measured is [0, 4] V.
|
||||
*/
|
||||
uint16_t system_adc1_read(adc1_read_pad_t pad, adc1_read_atten_t atten);
|
||||
|
||||
/**
|
||||
* @brief Measure the power voltage of VDD3P3 pin 3 and 4, unit : 1/1024 V.
|
||||
*
|
||||
* @attention system_get_vdd33 depends on RF, please do not use it if RF is disabled.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return Power voltage of VDD33, unit : 1/1024 V
|
||||
*/
|
||||
uint16_t system_get_vdd33(void);
|
||||
|
||||
/**
|
||||
* @brief Write data into flash with protection.
|
||||
*
|
||||
* Flash read/write has to be 4-bytes aligned.
|
||||
*
|
||||
* Protection of flash read/write :
|
||||
* use 3 sectors (4KBytes per sector) to save 4KB data with protect,
|
||||
* sector 0 and sector 1 are data sectors, back up each other,
|
||||
* save data alternately, sector 2 is flag sector, point out which sector
|
||||
* is keeping the latest data, sector 0 or sector 1.
|
||||
*
|
||||
* @param uint16 start_sec : start sector (sector 0) of the 3 sectors which are
|
||||
* used for flash read/write protection.
|
||||
* - For example, in IOT_Demo we can use the 3 sectors (3 * 4KB) starting from flash
|
||||
* 0x3D000 for flash read/write protection, so the parameter start_sec should be 0x3D
|
||||
* @param void *param : pointer of the data to be written
|
||||
* @param uint16 len : data length, should be less than a sector, which is 4 * 1024
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_param_save_with_protect(uint16_t start_sec, void *param, uint16_t len);
|
||||
|
||||
/**
|
||||
* @brief Read the data saved into flash with the read/write protection.
|
||||
*
|
||||
* Flash read/write has to be 4-bytes aligned.
|
||||
*
|
||||
* Read/write protection of flash:
|
||||
* use 3 sectors (4KB per sector) to save 4KB data with protect, sector
|
||||
* 0 and sector 1 are data sectors, back up each other, save data alternately,
|
||||
* sector 2 is flag sector, point out which sector is keeping the latest data,
|
||||
* sector 0 or sector 1.
|
||||
*
|
||||
* @param uint16 start_sec : start sector (sector 0) of the 3 sectors used for
|
||||
* flash read/write protection. It cannot be sector 1 or sector 2.
|
||||
* - For example, in IOT_Demo, the 3 sectors (3 * 4KB) starting from flash 0x3D000
|
||||
* can be used for flash read/write protection.
|
||||
* The parameter start_sec is 0x3D, and it cannot be 0x3E or 0x3F.
|
||||
* @param uint16 offset : offset of data saved in sector
|
||||
* @param void *param : data pointer
|
||||
* @param uint16 len : data length, offset + len =< 4 * 1024
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_param_load(uint16_t start_sec, uint16_t offset, void *param, uint16_t len);
|
||||
|
||||
|
||||
/** \defgroup System_boot_APIs Boot APIs
|
||||
* @brief boot APIs
|
||||
*/
|
||||
@@ -288,63 +173,15 @@ bool system_param_load(uint16_t start_sec, uint16_t offset, void *param, uint16_
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
DEFAULT_MAC = 0, /**< Default hardware MAC provided by Espressif Systems */
|
||||
USER_MAC, /**< User-define hardware MAC */
|
||||
} mac_group_t;
|
||||
|
||||
typedef enum {
|
||||
WIFI_MAC = 0, /**< Hardware MAC address of ESP32 WiFi */
|
||||
BT_MAC, /**< Hardware MAC address of ESP32 bluetooth */
|
||||
} mac_type_t;
|
||||
|
||||
/**
|
||||
* @brief Set user-define hardware MAC address.
|
||||
*
|
||||
* @attention Hardware MAC address can only be set ONCE for each ESP32 chip.
|
||||
*
|
||||
* @param mac_type type : type of hardware MAC address.
|
||||
* @param uint8 *mac : user-define hardware MAC address, length: 6 bytes.
|
||||
*
|
||||
* @return 0 : succeed to set.
|
||||
* @return 1 : the hardware MAC has been set once, users can not set it any more.
|
||||
* @return 2 : fail to set.
|
||||
* @return 3 : invalid parameter.
|
||||
*/
|
||||
int system_efuse_program_user_mac(mac_type_t type, uint8_t *mac);
|
||||
|
||||
/**
|
||||
* @brief Read hardware MAC address.
|
||||
*
|
||||
* @param mac_group group : default MAC or user-defined MAC.
|
||||
* @param mac_type type : type of hardware MAC address.
|
||||
* @param uint8 *mac : the hardware MAC address, length: 6 bytes.
|
||||
* @param uint8 mac[6] : the hardware MAC address, length: 6 bytes.
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
* @return esp_err_t
|
||||
*/
|
||||
bool system_efuse_read_mac(mac_group_t group, mac_type_t type, uint8_t *mac);
|
||||
esp_err_t system_efuse_read_mac(uint8_t mac[6]);
|
||||
|
||||
/**
|
||||
* @brief Set hardware MAC group, default MAC or user-defined MAC.
|
||||
*
|
||||
* @attention This API needs system_restart to take effect.
|
||||
*
|
||||
* @param mac_group group : default MAC or user-defined MAC.
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_efuse_set_mac_group(mac_group_t group);
|
||||
|
||||
/**
|
||||
* @brief Get hardware MAC group, default MAC or user-defined MAC.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return mac_group, the hardware MAC group.
|
||||
*/
|
||||
mac_group_t system_efuse_get_mac_group(void);
|
||||
|
||||
void system_init(void);
|
||||
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "esp_err.h"
|
||||
#include "rom/queue.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -220,6 +221,15 @@ esp_err_t esp_wifi_set_config(wifi_interface_t ifx, wifi_config_t *conf);
|
||||
|
||||
esp_err_t esp_wifi_get_config(wifi_interface_t ifx, wifi_config_t *conf);
|
||||
|
||||
struct station_info {
|
||||
STAILQ_ENTRY(station_info) next;
|
||||
uint8_t bssid[6];
|
||||
};
|
||||
|
||||
esp_err_t esp_wifi_get_station_list(struct station_info **station);
|
||||
|
||||
esp_err_t esp_wifi_free_station_list(void);
|
||||
|
||||
typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void* eb);
|
||||
|
||||
esp_err_t esp_wifi_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
|
||||
|
||||
@@ -232,10 +232,10 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
|
||||
|
||||
|
||||
#define ETS_INTR_ENABLE(inum) \
|
||||
ets_isr_unmask((1<<inum))
|
||||
xt_ints_on((1<<inum))
|
||||
|
||||
#define ETS_INTR_DISABLE(inum) \
|
||||
ets_isr_mask((1<<inum))
|
||||
xt_ints_off((1<<inum))
|
||||
|
||||
#define ETS_CCOMPARE_INTR_ENBALE() \
|
||||
ETS_INTR_ENABLE(ETS_CCOMPARE_INUM)
|
||||
|
||||
@@ -89,7 +89,7 @@
|
||||
#define APB_CLK_FREQ_ROM 13*1000000
|
||||
#define CPU_CLK_FREQ_ROM APB_CLK_FREQ_ROM
|
||||
#define CPU_CLK_FREQ APB_CLK_FREQ
|
||||
#define APB_CLK_FREQ 40*1000000 //unit: Hz
|
||||
#define APB_CLK_FREQ 80*1000000 //unit: Hz
|
||||
#define UART_CLK_FREQ APB_CLK_FREQ
|
||||
//#define WDT_CLK_FREQ APB_CLK_FREQ
|
||||
#define TIMER_CLK_FREQ (80000000>>4) //80MHz divided by 16
|
||||
|
||||
Reference in New Issue
Block a user