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update cache config
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@@ -50,17 +50,23 @@ void spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void);
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// This function is implied to be called when other CPU is not running or running code from IRAM.
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void spi_flash_enable_interrupts_caches_no_os(void);
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// Flushes cache if address range has corresponding valid cache mappings
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// Recommended to use post flash program operation (erase or write)
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// Mark the pages containing a flash region as having been
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// erased or written to. This means the flash cache needs
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// to be evicted before these pages can be flash_mmap()ed again,
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// as they may contain stale data
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//
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// Only call this while holding spi_flash_op_lock()
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// Returns true if cache was flushed, false otherwise
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bool spi_flash_check_and_flush_cache(uint32_t start_addr, uint32_t length);
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//config cache mode
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#ifdef CONFIG_IDF_TARGET_ESP32S2BETA
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//config instrcutin cache size and cache block size by menuconfig
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void esp_config_instruction_cache_mode(void);
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//config data cache size and cache block size by menuconfig
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void esp_config_data_cache_mode(void);
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void esp_switch_rodata_to_dcache(void);
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//enable cache wrap mode for instruction cache and data cache
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esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable);
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#endif
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