ci(spi_flash): add tests for cache2phys with XIP

This commit is contained in:
Xiao Xufeng
2024-05-27 01:45:02 +08:00
parent 5cb8f87bbe
commit 31259552f5
15 changed files with 95 additions and 37 deletions

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@@ -28,6 +28,16 @@ components/spi_flash/test_apps/flash_encryption:
- esp_mm
- spi_flash
components/spi_flash/test_apps/flash_mmap:
depends_components:
- esp_mm
- spi_flash
enable:
- if: CONFIG_NAME in ["release", "rom_impl"] and IDF_TARGET != "linux"
- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3"]
# S2 doesn't have ROM for flash
- if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3"]
components/spi_flash/test_apps/flash_suspend:
disable:
- if: SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND != 1

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@@ -7,6 +7,7 @@
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
#include "esp_log.h"
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <freertos/semphr.h>
@@ -493,3 +494,14 @@ TEST_CASE("no stale data read post mmap and write partition", "[spi_flash][mmap]
TEST_ASSERT_EQUAL(0, memcmp(buf, read_data, sizeof(buf)));
#endif
}
TEST_CASE("spi_flash_cache2phys points to correct address", "[spi_flash]")
{
//_rodata_start, which begins with appdesc, is always the first segment of the bin.
extern int _rodata_start;
size_t addr = spi_flash_cache2phys(&_rodata_start);
const esp_partition_t *factory = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, "factory");
ESP_LOGI("running bin", "0x%p", (void*)addr);
TEST_ASSERT_HEX32_WITHIN(CONFIG_MMU_PAGE_SIZE/2, factory->address + CONFIG_MMU_PAGE_SIZE/2, addr);
}

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@@ -1,5 +1,6 @@
# Name, Type, SubType, Offset, Size, Flags
# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
nvs, data, nvs, 0x9000, 0x6000,
factory, 0, 0, 0x10000, 1M
flash_test, data, fat, , 528K
flash_test, data, fat, 0x10000, 528K
# This partition is placed to this weird address intentionally to test spi_flash_cache2phys
factory, 0, 0, 0xF0000, 1M
1 # Name, Type, SubType, Offset, Size, Flags
2 # Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
3 nvs, data, nvs, 0x9000, 0x6000,
4 factory, 0, 0, 0x10000, 1M flash_test, data, fat, 0x10000, 528K
5 flash_test, data, fat, , 528K # This partition is placed to this weird address intentionally to test spi_flash_cache2phys
6 factory, 0, 0, 0xF0000, 1M

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@@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest
from pytest_embedded import Dut
@@ -35,19 +34,20 @@ def test_flash_mmap_rom_impl(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=30)
XIP_CONFIGS = [
pytest.param('xip_psram_esp32s2', marks=[pytest.mark.esp32s2]),
pytest.param('xip_psram_esp32s3', marks=[pytest.mark.esp32s3]),
]
@pytest.mark.supported_targets
@pytest.mark.generic
@pytest.mark.parametrize('config', XIP_CONFIGS, indirect=True)
@pytest.mark.parametrize(
'config',
[
'xip_psram',
],
indirect=True,
)
def test_flash_mmap_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=30)
@pytest.mark.esp32s3
@pytest.mark.supported_targets
@pytest.mark.generic
@pytest.mark.parametrize(
'config',

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@@ -0,0 +1,2 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y

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@@ -1,4 +1,3 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y
CONFIG_SPI_FLASH_ROM_IMPL=y