refactor(esp32c5): change beta3 path in soc

This commit is contained in:
laokaiyao
2024-02-20 18:23:18 +08:00
parent 3a5d080ec0
commit 319e30ac38
168 changed files with 381 additions and 81 deletions

View File

@@ -1,111 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
// TODO: [ESP32C5] IDF-8654 need update for MP version
//Interrupt hardware source table
//This table is decided by hardware, don't touch this.
typedef enum {
ETS_WIFI_MAC_INTR_SOURCE,
ETS_WIFI_MAC_NMI_SOURCE,
ETS_WIFI_PWR_INTR_SOURCE,
ETS_WIFI_BB_INTR_SOURCE,
ETS_BT_MAC_INTR_SOURCE,
ETS_BT_BB_INTR_SOURCE,
ETS_BT_BB_NMI_SOURCE,
ETS_LP_TIMER_INTR_SOURCE,
ETS_COEX_INTR_SOURCE,
ETS_BLE_TIMER_INTR_SOURCE,
ETS_BLE_SEC_INTR_SOURCE,
ETS_I2C_MST_INTR_SOURCE,
ETS_ZB_MAC_INTR_SOURCE,
ETS_PMU_INTR_SOURCE,
ETS_EFUSE_INTR_SOURCE,
ETS_LP_RTC_TIMER_INTR_SOURCE,
ETS_LP_UART_INTR_SOURCE,
ETS_LP_I2C_INTR_SOURCE,
ETS_LP_WDT_INTR_SOURCE,
ETS_LP_PERI_TIMEOUT_INTR_SOURCE,
ETS_LP_APM_M0_INTR_SOURCE,
ETS_LP_APM_M1_INTR_SOURCE,
ETS_HUK_INTR_SOURCE,
ETS_FROM_CPU_INTR0_SOURCE,
ETS_FROM_CPU_INTR1_SOURCE,
ETS_FROM_CPU_INTR2_SOURCE,
ETS_FROM_CPU_INTR3_SOURCE,
ETS_ASSIST_DEBUG_INTR_SOURCE,
ETS_TRACE_INTR_SOURCE,
ETS_CACHE_INTR_SOURCE,
ETS_CPU_PERI_TIMEOUT_INTR_SOURCE,
ETS_GPIO_INTR_SOURCE,
ETS_GPIO_NMI_SOURCE,
ETS_GPIO_PAD_COMP_INTR_SOURCE,
ETS_PAU_INTR_SOURCE,
ETS_HP_PERI_TIMEOUT_INTR_SOURCE,
ETS_MODEM_PERI_TIMEOUT_INTR_SOURCE,
ETS_HP_APM_M0_INTR_SOURCE,
ETS_HP_APM_M1_INTR_SOURCE,
ETS_HP_APM_M2_INTR_SOURCE,
ETS_HP_APM_M3_INTR_SOURCE,
ETS_LP_APM0_INTR_SOURCE,
ETS_MSPI_INTR_SOURCE,
ETS_I2S1_INTR_SOURCE,
ETS_UHCI0_INTR_SOURCE,
ETS_UART0_INTR_SOURCE,
ETS_UART1_INTR_SOURCE,
ETS_LEDC_INTR_SOURCE,
ETS_TWAI0_INTR_SOURCE,
ETS_TWAI1_INTR_SOURCE,
ETS_USB_INTR_SOURCE,
ETS_RMT_INTR_SOURCE,
ETS_I2C_EXT0_INTR_SOURCE,
ETS_TG0_T0_LEVEL_INTR_SOURCE,
ETS_TG0_T1_LEVEL_INTR_SOURCE,
ETS_TG0_WDT_LEVEL_INTR_SOURCE,
ETS_TG1_T0_LEVEL_INTR_SOURCE,
ETS_TG1_T1_LEVEL_INTR_SOURCE,
ETS_TG1_WDT_LEVEL_INTR_SOURCE,
ETS_SYSTIMER_TARGET0_INTR_SOURCE,
ETS_SYSTIMER_TARGET1_INTR_SOURCE,
ETS_SYSTIMER_TARGET2_INTR_SOURCE,
ETS_APB_ADC_INTR_SOURCE,
ETS_PWM_INTR_SOURCE,
ETS_PCNT_INTR_SOURCE,
ETS_PARL_IO_TX_INTR_SOURCE,
ETS_PARL_IO_RX_INTR_SOURCE,
ETS_SLC0_INTR_SOURCE,
ETS_SLC1_INTR_SOURCE,
ETS_USB_OTG20_INTR_SOURCE,
ETS_USB_OTG20_MULTI_PROC_INTR_SOURCE,
ETS_USB_OTG20_MISC_INTR_SOURCE,
ETS_DMA_IN_CH0_INTR_SOURCE,
ETS_DMA_IN_CH1_INTR_SOURCE,
ETS_DMA_IN_CH2_INTR_SOURCE,
ETS_DMA_OUT_CH0_INTR_SOURCE,
ETS_DMA_OUT_CH1_INTR_SOURCE,
ETS_DMA_OUT_CH2_INTR_SOURCE,
ETS_GPSPI2_INTR_SOURCE,
ETS_AES_INTR_SOURCE,
ETS_SHA_INTR_SOURCE,
ETS_RSA_INTR_SOURCE,
ETS_ECC_INTR_SOURCE,
ETS_ECDSA_INTR_SOURCE,
ETS_KM_INTR_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];
#ifdef __cplusplus
}
#endif