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xtensa: Move saving of a0 register to match upstream

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Upstream xtensa exception handling will save PS, PC, and a0 registers
together when saving a minimal context. This commit ppdates the xtensa
exception handling to match upstream behavior.
This commit is contained in:
Darian Leung
2022-02-03 16:54:23 +08:00
parent b092fa0730
commit 3336b057d6
6 changed files with 12 additions and 30 deletions
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6
components/freertos/FreeRTOS-Kernel/portable/xtensa/xtensa_vectors.S
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@@ -622,6 +622,8 @@ _xt_user_exc:
s32i a0, sp, XT_STK_PS
rsr a0, EPC_1 /* save interruptee's PC */
s32i a0, sp, XT_STK_PC
rsr a0, EXCSAVE_1 /* save interruptee's a0 */
s32i a0, sp, XT_STK_A0
#if XCHAL_HAVE_WINDOWED
s32e a0, sp, -16 /* for debug backtrace */
#endif
@@ -635,10 +637,6 @@ _xt_user_exc:
rsr a0, EXCVADDR
s32i a0, sp, XT_STK_EXCVADDR
/* _xt_context_save seems to save the current a0, but we need the interuptees a0. Fix this. */
rsr a0, EXCSAVE_1 /* save interruptee's a0 */
s32i a0, sp, XT_STK_A0
/* Set up PS for C, reenable debug and NMI interrupts, and clear EXCM. */
#ifdef __XTENSA_CALL0_ABI__
movi a0, PS_INTLEVEL(XCHAL_DEBUGLEVEL - 2) | PS_UM