feat(clk): Add basic clock support for esp32c61

- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
This commit is contained in:
Song Ruo Jing
2024-07-19 17:10:06 +08:00
parent d92c09a0ad
commit 335d39b869
53 changed files with 1193 additions and 741 deletions

View File

@@ -83,10 +83,10 @@
}
#endif // BOOTLOADER_BUILD
#if CONFIG_IDF_ENV_FPGA
#if CONFIG_ESP_BRINGUP_BYPASS_RANDOM_SETTING
static void s_non_functional(const char *func)
{
ESP_EARLY_LOGW("rand", "%s non-functional for FPGA builds", func);
ESP_EARLY_LOGW("rand", "%s non-functional as RNG has not been supported yet", func);
}
void bootloader_random_enable()
@@ -98,4 +98,4 @@ void bootloader_random_disable()
{
s_non_functional(__func__);
}
#endif // CONFIG_IDF_ENV_FPGA
#endif // CONFIG_ESP_BRINGUP_BYPASS_RANDOM_SETTING