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https://github.com/espressif/esp-idf.git
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feat(clk): Add basic clock support for esp32c61
- Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration - Remove FPGA build
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@@ -83,10 +83,10 @@
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}
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#endif // BOOTLOADER_BUILD
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#if CONFIG_IDF_ENV_FPGA
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#if CONFIG_ESP_BRINGUP_BYPASS_RANDOM_SETTING
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static void s_non_functional(const char *func)
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{
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ESP_EARLY_LOGW("rand", "%s non-functional for FPGA builds", func);
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ESP_EARLY_LOGW("rand", "%s non-functional as RNG has not been supported yet", func);
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}
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void bootloader_random_enable()
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@@ -98,4 +98,4 @@ void bootloader_random_disable()
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{
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s_non_functional(__func__);
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}
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#endif // CONFIG_IDF_ENV_FPGA
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#endif // CONFIG_ESP_BRINGUP_BYPASS_RANDOM_SETTING
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