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feat(clk): Add basic clock support for esp32c61

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- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
This commit is contained in:
Song Ruo Jing
2024-07-19 17:10:06 +08:00
parent d92c09a0ad
commit 335d39b869
53 changed files with 1193 additions and 741 deletions
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2
components/soc/esp32c5/gpio_periph.c
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@@ -6,8 +6,6 @@
#include "soc/gpio_periph.h"
_Static_assert(sizeof(GPIO_PIN_MUX_REG) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_PIN_MUX_REG");
const uint32_t GPIO_HOLD_MASK[] = {
BIT(0), //GPIO0 // LP_AON_GPIO_HOLD0_REG
BIT(1), //GPIO1