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Merge branch 'feature/esp32h4_clock_support' into 'master'

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feat(clk): Add basic clock support for esp32h4

Closes IDF-12285, IDF-12912, and IDF-12499

See merge request espressif/esp-idf!40166
This commit is contained in:
Song Ruo Jing
2025-07-11 15:51:43 +08:00
parent 39d2225237 b3fd9b6afa
commit 3519fbd30b
79 changed files with 931 additions and 1151 deletions
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2
components/soc/esp32p4/include/soc/clk_tree_defs.h
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@@ -106,6 +106,8 @@ typedef enum {
SOC_RTC_SLOW_CLK_SRC_XTAL32K = 1, /*!< Select XTAL32K_CLK as RTC_SLOW_CLK source */
SOC_RTC_SLOW_CLK_SRC_RC32K = 2, /*!< Select RC32K_CLK as RTC_SLOW_CLK source */
SOC_RTC_SLOW_CLK_SRC_INVALID, /*!< Invalid RTC_SLOW_CLK source */
SOC_RTC_SLOW_CLK_SRC_DEFAULT = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, /*!< RC_SLOW_CLK is the default clock source for RTC_SLOW_CLK */
} soc_rtc_slow_clk_src_t;
/**

4
components/soc/esp32p4/include/soc/soc.h
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@@ -136,12 +136,8 @@
//}}
//Periheral Clock {{
#define APB_CLK_FREQ_ROM ( 10*1000000 )
#define CPU_CLK_FREQ_ROM ( 40*1000000 )
#define CPU_CLK_FREQ_MHZ_BTLD (90) // The cpu clock frequency (in MHz) to set at 2nd stage bootloader system clock configuration
#define APB_CLK_FREQ ( 90*1000000 )
#define REF_CLK_FREQ ( 1000000 )
#define XTAL_CLK_FREQ (40*1000000)
//}}
/* Overall memory map */