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Merge branch 'feature/add_esp32s3_bootloader_ld_file' into 'master'
move part of esp32-s3 codes to master (bootloader linker, esp32s3 empty componnet) See merge request espressif/esp-idf!9608
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@@ -58,11 +58,6 @@ else()
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target_link_libraries(${COMPONENT_LIB} PUBLIC gcc)
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0")
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#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
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#linker will ignore panic_highint_hdl.S as it has no other files depending on any
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#symbols in it.
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_panic_highint_hdl")
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idf_build_get_property(config_dir CONFIG_DIR)
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# Preprocess esp32s2.ld linker script to include configuration, becomes esp32s2_out.ld
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set(LD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/ld)
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@@ -427,6 +427,7 @@ menu "ESP32S2-specific"
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bool "Internal 90kHz RC oscillator"
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config ESP32S2_RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config ESP32S2_RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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config ESP32S2_RTC_CLK_SRC_INT_8MD256
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@@ -545,19 +546,6 @@ menu "Power Management"
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If disabled, DFS will not be active until the application
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configures it using esp_pm_configure function.
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config PM_USE_RTC_TIMER_REF
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bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
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depends on PM_ENABLE && (ESP32S2_TIME_SYSCALL_USE_RTC || ESP32S2_TIME_SYSCALL_USE_RTC_FRC1)
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default n
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help
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When APB clock frequency changes, high-resolution timer (esp_timer)
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scale and base value need to be adjusted. Each adjustment may cause
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small error, and over time such small errors may cause time drift.
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If this option is enabled, RTC timer will be used as a reference to
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compensate for the drift.
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It is recommended that this option is only used if 32k XTAL is selected
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as RTC clock source.
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config PM_PROFILING
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bool "Enable profiling counters for PM locks"
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depends on PM_ENABLE
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