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soc: merge C3 caps into a single soc_caps.h

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This commit is contained in:
Marius Vikhammer
2021-04-26 09:52:36 +08:00
parent 788312a009
commit 38aa99d63d
29 changed files with 213 additions and 539 deletions
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2
components/hal/esp32c3/include/hal/cpu_ll.h
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@@ -15,7 +15,7 @@
#include <stdint.h>
#include "soc/cpu_caps.h"
#include "soc/soc_caps.h"
#include "esp_bit_defs.h"
#include "soc/assist_debug_reg.h"
#include "esp_attr.h"

10
components/hal/esp32c3/include/hal/ds_ll.h
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@@ -24,7 +24,7 @@
#include <string.h>
#include "soc/hwcrypto_reg.h"
#include "soc/ds_caps.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -69,7 +69,7 @@ static inline ds_key_check_t ds_ll_key_error_source(void)
*/
static inline void ds_ll_configure_iv(const uint32_t *iv)
{
for (size_t i = 0; i < (DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
for (size_t i = 0; i < (SOC_DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
REG_WRITE(DS_IV_BASE + (i * 4) , iv[i]);
}
}
@@ -99,9 +99,9 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p
*/
typedef struct { uint32_t addr; size_t len; } frag_t;
const frag_t frags[] = {
{DS_C_Y_BASE, DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_M_BASE, DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_RB_BASE, DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_Y_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_M_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_RB_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
{DS_C_BOX_BASE, DS_IV_BASE - DS_C_BOX_BASE},
};
const size_t NUM_FRAGS = sizeof(frags)/sizeof(frag_t);

2
components/hal/esp32c3/include/hal/gdma_ll.h
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@@ -17,7 +17,7 @@
#include <stdbool.h>
#include "soc/gdma_struct.h"
#include "soc/gdma_reg.h"
#include "soc/gdma_caps.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {

2
components/hal/esp32c3/include/hal/mpu_ll.h
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@@ -14,7 +14,7 @@
#include <stdint.h>
#include "soc/mpu_caps.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {

3
components/hal/esp32c3/include/hal/uart_ll.h
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@@ -32,6 +32,9 @@ extern "C" {
#define UART_LL_MIN_WAKEUP_THRESH (2)
#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
#define UART_LL_FSM_IDLE (0x0)
#define UART_LL_FSM_TX_WAIT_SEND (0xf)
// Define UART interrupts
typedef enum {
UART_INTR_RXFIFO_FULL = (0x1 << 0),

2
components/hal/esp32c3/rtc_cntl_hal.c
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@@ -19,7 +19,7 @@
#include "esp32c3/rom/lldesc.h"
#include "esp_attr.h"
#define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN (RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
#define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN (SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
typedef struct rtc_cntl_link_buf_conf {
uint32_t cfg[4]; /* 4 word for dma link buffer configuration */

2
components/hal/esp32c3/systimer_hal.c
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@@ -16,7 +16,7 @@
#include "hal/systimer_hal.h"
#include "hal/systimer_ll.h"
#include "hal/systimer_types.h"
#include "soc/systimer_caps.h"
#include "soc/soc_caps.h"
#include "hal/clk_gate_ll.h"
#define SYSTIMER_TICKS_PER_US (16) // Systimer clock source is fixed to 16MHz