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feat(spi_master): add transaction config for dynamic clock speed update

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Closes https://github.com/espressif/esp-idf/issues/13753
This commit is contained in:
wanckl
2025-01-26 20:32:27 +08:00
parent 194cafd22c
commit 39c85269cc
20 changed files with 211 additions and 128 deletions
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2
components/hal/esp32c5/include/hal/spi_ll.h
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@@ -735,6 +735,7 @@ static inline void spi_ll_master_set_clock_by_reg(spi_dev_t *hw, const spi_ll_cl
*
* @return Frequency of given dividers.
*/
__attribute__((always_inline))
static inline int spi_ll_freq_for_pre_n(int fapb, int pre, int n)
{
return (fapb / (pre * n));
@@ -750,6 +751,7 @@ static inline int spi_ll_freq_for_pre_n(int fapb, int pre, int n)
*
* @return Actual (nearest) frequency.
*/
__attribute__((always_inline))
static inline int spi_ll_master_cal_clock(int fapb, int hz, int duty_cycle, spi_ll_clock_val_t *out_reg)
{
typeof(GPSPI2.clock) reg = {.val = 0};