diff --git a/components/bootloader/subproject/main/ld/esp32/bootloader.ld b/components/bootloader/subproject/main/ld/esp32/bootloader.ld
index 30e5a79c45..6af138c9d9 100644
--- a/components/bootloader/subproject/main/ld/esp32/bootloader.ld
+++ b/components/bootloader/subproject/main/ld/esp32/bootloader.ld
@@ -63,6 +63,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libesp_rom.a:*.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)
diff --git a/components/bootloader_support/src/bootloader_flash.c b/components/bootloader_support/src/bootloader_flash.c
index d038fc525d..10d010f2c9 100644
--- a/components/bootloader_support/src/bootloader_flash.c
+++ b/components/bootloader_support/src/bootloader_flash.c
@@ -115,26 +115,20 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
 #else //BOOTLOADER_BUILD
 /* Bootloader version, uses ROM functions only */
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/spi_flash.h"
 #include "esp32/rom/cache.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/cache.h"
 #include "soc/cache_memory.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
-#include "esp32s3/rom/spi_flash.h"
 #include "esp32s3/rom/cache.h"
 #include "soc/cache_memory.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
-#include "esp32c3/rom/spi_flash.h"
 #include "esp32c3/rom/cache.h"
 #include "soc/cache_memory.h"
 #elif CONFIG_IDF_TARGET_ESP32H2
-#include "esp32h2/rom/spi_flash.h"
 #include "esp32h2/rom/cache.h"
 #include "soc/cache_memory.h"
 #elif CONFIG_IDF_TARGET_ESP8684
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/cache.h"
 #include "soc/cache_memory.h"
 #endif
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32.c b/components/bootloader_support/src/bootloader_flash_config_esp32.c
index e7d12178fc..6b1546e9a2 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp32.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp32.c
@@ -11,7 +11,6 @@
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
 #include "esp_rom_efuse.h"
-#include "esp32/rom/spi_flash.h"
 #include "soc/gpio_periph.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32c3.c b/components/bootloader_support/src/bootloader_flash_config_esp32c3.c
index afea291240..e1e753578c 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp32c3.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp32c3.c
@@ -10,7 +10,6 @@
 #include "esp_err.h"
 #include "esp_log.h"
 #include "esp32c3/rom/gpio.h"
-#include "esp32c3/rom/spi_flash.h"
 #include "esp32c3/rom/efuse.h"
 #include "soc/gpio_periph.h"
 #include "soc/efuse_reg.h"
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32h2.c b/components/bootloader_support/src/bootloader_flash_config_esp32h2.c
index 9fa9364b89..3851fe9bf7 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp32h2.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp32h2.c
@@ -10,7 +10,6 @@
 #include "esp_err.h"
 #include "esp_log.h"
 #include "esp32h2/rom/gpio.h"
-#include "esp32h2/rom/spi_flash.h"
 #include "esp32h2/rom/efuse.h"
 #include "soc/gpio_periph.h"
 #include "soc/efuse_reg.h"
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s2.c b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c
index 73bccd895f..35847db9a8 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp32s2.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c
@@ -9,7 +9,6 @@
 #include "sdkconfig.h"
 #include "esp_err.h"
 #include "esp_log.h"
-#include "esp32s2/rom/spi_flash.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s3.c b/components/bootloader_support/src/bootloader_flash_config_esp32s3.c
index b8f37b0f82..4a36521540 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp32s3.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp32s3.c
@@ -9,7 +9,6 @@
 #include "sdkconfig.h"
 #include "esp_err.h"
 #include "esp_log.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp8684.c b/components/bootloader_support/src/bootloader_flash_config_esp8684.c
index 27fbf9d5ee..bf4603b038 100644
--- a/components/bootloader_support/src/bootloader_flash_config_esp8684.c
+++ b/components/bootloader_support/src/bootloader_flash_config_esp8684.c
@@ -10,8 +10,8 @@
 #include "esp_err.h"
 #include "esp_log.h"
 #include "esp8684/rom/gpio.h"
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/efuse.h"
+#include "esp_rom_spiflash.h"
 #include "soc/gpio_periph.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c
index 5399756b58..f28cea76f7 100644
--- a/components/bootloader_support/src/bootloader_utility.c
+++ b/components/bootloader_support/src/bootloader_utility.c
@@ -52,7 +52,6 @@
 #include "esp8684/rom/cache.h"
 #include "esp8684/rom/efuse.h"
 #include "esp8684/rom/ets_sys.h"
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/crc.h"
 #include "esp8684/rom/rtc.h"
 #include "esp8684/rom/uart.h"
diff --git a/components/bootloader_support/src/esp8684/bootloader_esp8684.c b/components/bootloader_support/src/esp8684/bootloader_esp8684.c
index de005872b0..ca7a38d901 100644
--- a/components/bootloader_support/src/esp8684/bootloader_esp8684.c
+++ b/components/bootloader_support/src/esp8684/bootloader_esp8684.c
@@ -13,6 +13,7 @@
 #include "esp_rom_efuse.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
+#include "esp_rom_spiflash.h"
 #include "soc/efuse_reg.h"
 #include "soc/gpio_sig_map.h"
 #include "soc/io_mux_reg.h"
@@ -24,10 +25,8 @@
 #include "soc/io_mux_reg.h"
 #include "soc/system_reg.h"
 #include "esp8684/rom/efuse.h"
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/cache.h"
 #include "esp8684/rom/ets_sys.h"
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/rtc.h"
 #include "bootloader_common.h"
 #include "bootloader_init.h"
diff --git a/components/esp_hw_support/port/esp32/spiram_psram.c b/components/esp_hw_support/port/esp32/spiram_psram.c
index 817f7fba3d..8865ea693c 100644
--- a/components/esp_hw_support/port/esp32/spiram_psram.c
+++ b/components/esp_hw_support/port/esp32/spiram_psram.c
@@ -17,7 +17,6 @@
 #include "esp_log.h"
 #include "esp_efuse.h"
 #include "spiram_psram.h"
-#include "esp32/rom/spi_flash.h"
 #include "esp32/rom/cache.h"
 #include "esp32/rom/efuse.h"
 #include "esp_rom_efuse.h"
diff --git a/components/esp_hw_support/port/esp32s2/spiram_psram.c b/components/esp_hw_support/port/esp32s2/spiram_psram.c
index 2c0acebc85..2a59d2e844 100644
--- a/components/esp_hw_support/port/esp32s2/spiram_psram.c
+++ b/components/esp_hw_support/port/esp32s2/spiram_psram.c
@@ -16,7 +16,6 @@
 #include "esp_types.h"
 #include "esp_log.h"
 #include "spiram_psram.h"
-#include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/opi_flash.h"
 #include "esp32s2/rom/cache.h"
 #include "esp32s2/rom/efuse.h"
diff --git a/components/esp_hw_support/port/esp32s3/opiram_psram.c b/components/esp_hw_support/port/esp32s3/opiram_psram.c
index d29d564a36..6d75d6be8d 100644
--- a/components/esp_hw_support/port/esp32s3/opiram_psram.c
+++ b/components/esp_hw_support/port/esp32s3/opiram_psram.c
@@ -12,7 +12,6 @@
 #include "esp_log.h"
 #include "spiram_psram.h"
 #include "esp32s3/rom/ets_sys.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "esp32s3/rom/opi_flash.h"
 #include "esp32s3/rom/gpio.h"
 #include "esp32s3/rom/cache.h"
diff --git a/components/esp_hw_support/port/esp32s3/spiram_psram.c b/components/esp_hw_support/port/esp32s3/spiram_psram.c
index 22129d8940..2ad72b7e81 100644
--- a/components/esp_hw_support/port/esp32s3/spiram_psram.c
+++ b/components/esp_hw_support/port/esp32s3/spiram_psram.c
@@ -16,7 +16,6 @@
 #include "esp_types.h"
 #include "esp_log.h"
 #include "spiram_psram.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "esp32s3/rom/opi_flash.h"
 #include "esp32s3/rom/cache.h"
 #include "esp32s3/rom/efuse.h"
diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt
index 3b57d02faa..2af8d81cac 100644
--- a/components/esp_rom/CMakeLists.txt
+++ b/components/esp_rom/CMakeLists.txt
@@ -16,6 +16,7 @@ else()
     list(APPEND sources "patches/esp_rom_crc.c"
                         "patches/esp_rom_sys.c"
                         "patches/esp_rom_uart.c"
+                        "patches/esp_rom_spiflash.c"
                         "patches/esp_rom_tjpgd.c")
     list(APPEND private_required_comp soc hal)
 endif()
@@ -26,7 +27,8 @@ endif()
 
 idf_component_register(SRCS ${sources}
                        INCLUDE_DIRS ${include_dirs}
-                       PRIV_REQUIRES ${private_required_comp})
+                       PRIV_REQUIRES ${private_required_comp}
+                       LDFRAGMENTS linker.lf)
 
 if(target STREQUAL "esp32h2")
     if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1)
diff --git a/components/esp_rom/include/esp32/rom/spi_flash.h b/components/esp_rom/include/esp32/rom/spi_flash.h
index db70b1ba90..cfc2976f64 100644
--- a/components/esp_rom/include/esp32/rom/spi_flash.h
+++ b/components/esp_rom/include/esp32/rom/spi_flash.h
@@ -115,6 +115,12 @@ extern "C" {
 
 #define FLASH_ID_GD25LQ32C  0xC86016
 
+typedef enum {
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
+
 extern uint8_t g_rom_spiflash_dummy_len_plus[];
 
 /**
diff --git a/components/esp_rom/include/esp32c3/rom/spi_flash.h b/components/esp_rom/include/esp32c3/rom/spi_flash.h
index 83f330680d..291f581097 100644
--- a/components/esp_rom/include/esp32c3/rom/spi_flash.h
+++ b/components/esp_rom/include/esp32c3/rom/spi_flash.h
@@ -71,18 +71,18 @@ extern "C" {
 #define FLASH_ID_GD25LQ32C  0xC86016
 
 typedef enum {
-    SPI_FLASH_RESULT_OK,
-    SPI_FLASH_RESULT_ERR,
-    SPI_FLASH_RESULT_TIMEOUT
-} SpiFlashOpResult;
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
 
 typedef void (* spi_flash_func_t)(void);
-typedef SpiFlashOpResult (* spi_flash_op_t)(void);
-typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
-typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
-typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
+typedef esp_rom_spiflash_result_t (* spi_flash_op_t)(void);
+typedef esp_rom_spiflash_result_t (* spi_flash_erase_t)(uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_wren_t)(void*);
 
 typedef struct {
     uint32_t read_sub_len;
diff --git a/components/esp_rom/include/esp32h2/rom/spi_flash.h b/components/esp_rom/include/esp32h2/rom/spi_flash.h
index 9f3a1dab8c..fb1faabe98 100644
--- a/components/esp_rom/include/esp32h2/rom/spi_flash.h
+++ b/components/esp_rom/include/esp32h2/rom/spi_flash.h
@@ -71,18 +71,18 @@ extern "C" {
 #define FLASH_ID_GD25LQ32C  0xC86016
 
 typedef enum {
-    SPI_FLASH_RESULT_OK,
-    SPI_FLASH_RESULT_ERR,
-    SPI_FLASH_RESULT_TIMEOUT
-} SpiFlashOpResult;
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
 
 typedef void (* spi_flash_func_t)(void);
-typedef SpiFlashOpResult (* spi_flash_op_t)(void);
-typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
-typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
-typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
+typedef esp_rom_spiflash_result_t (* spi_flash_op_t)(void);
+typedef esp_rom_spiflash_result_t (* spi_flash_erase_t)(uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_wren_t)(void*);
 
 typedef struct {
     uint32_t read_sub_len;
diff --git a/components/esp_rom/include/esp32s2/rom/opi_flash.h b/components/esp_rom/include/esp32s2/rom/opi_flash.h
index 9aa0b97c23..1c2392e354 100644
--- a/components/esp_rom/include/esp32s2/rom/opi_flash.h
+++ b/components/esp_rom/include/esp32s2/rom/opi_flash.h
@@ -8,7 +8,6 @@
 #include <stdio.h>
 #include <string.h>
 #include <stdint.h>
-#include "spi_flash.h"
 #include "esp_rom_spiflash.h"
 
 #ifdef __cplusplus
diff --git a/components/esp_rom/include/esp32s2/rom/spi_flash.h b/components/esp_rom/include/esp32s2/rom/spi_flash.h
index c34e95cb90..45ee6bb704 100644
--- a/components/esp_rom/include/esp32s2/rom/spi_flash.h
+++ b/components/esp_rom/include/esp32s2/rom/spi_flash.h
@@ -107,10 +107,10 @@ extern "C" {
 #define FLASH_ID_GD25LQ32C  0xC86016
 
 typedef enum {
-    SPI_FLASH_RESULT_OK,
-    SPI_FLASH_RESULT_ERR,
-    SPI_FLASH_RESULT_TIMEOUT
-} SpiFlashOpResult;
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
 
 extern uint8_t g_rom_spiflash_dummy_len_plus[];
 
diff --git a/components/esp_rom/include/esp32s3/rom/opi_flash.h b/components/esp_rom/include/esp32s3/rom/opi_flash.h
index 539314eb03..67feabb600 100644
--- a/components/esp_rom/include/esp32s3/rom/opi_flash.h
+++ b/components/esp_rom/include/esp32s3/rom/opi_flash.h
@@ -9,7 +9,6 @@
 #include <string.h>
 #include <stdint.h>
 #include <stdbool.h>
-#include "spi_flash.h"
 #include "esp_rom_spiflash.h"
 
 #ifdef __cplusplus
diff --git a/components/esp_rom/include/esp32s3/rom/spi_flash.h b/components/esp_rom/include/esp32s3/rom/spi_flash.h
index a070f450c1..832ad2496e 100644
--- a/components/esp_rom/include/esp32s3/rom/spi_flash.h
+++ b/components/esp_rom/include/esp32s3/rom/spi_flash.h
@@ -100,19 +100,19 @@ extern "C" {
 
 
 typedef enum {
-    SPI_FLASH_RESULT_OK,
-    SPI_FLASH_RESULT_ERR,
-    SPI_FLASH_RESULT_TIMEOUT
-} SpiFlashOpResult;
+    ESP_ROM_SPIFLASH_RESULT_OK,
+    ESP_ROM_SPIFLASH_RESULT_ERR,
+    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
+} esp_rom_spiflash_result_t;
 
 typedef void (*spi_flash_func_t)(void);
-typedef SpiFlashOpResult (*spi_flash_op_t)(void);
-typedef SpiFlashOpResult (*spi_flash_erase_t)(uint32_t);
-typedef SpiFlashOpResult (*spi_flash_rd_t)(uint32_t, void*, int);
-typedef SpiFlashOpResult (*spi_flash_wr_t)(uint32_t, const uint32_t*, int);
-typedef SpiFlashOpResult (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
-typedef SpiFlashOpResult (*spi_flash_wren_t)(void*);
-typedef SpiFlashOpResult (* spi_flash_erase_area_t)(uint32_t, uint32_t);
+typedef esp_rom_spiflash_result_t (*spi_flash_op_t)(void);
+typedef esp_rom_spiflash_result_t (*spi_flash_erase_t)(uint32_t);
+typedef esp_rom_spiflash_result_t (*spi_flash_rd_t)(uint32_t, void*, int);
+typedef esp_rom_spiflash_result_t (*spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef esp_rom_spiflash_result_t (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef esp_rom_spiflash_result_t (*spi_flash_wren_t)(void*);
+typedef esp_rom_spiflash_result_t (* spi_flash_erase_area_t)(uint32_t, uint32_t);
 
 typedef struct {
     uint8_t pp_addr_bit_len;
diff --git a/components/esp_rom/include/esp8684/rom/spi_flash.h b/components/esp_rom/include/esp8684/rom/spi_flash.h
index ce536e4ff2..291f581097 100644
--- a/components/esp_rom/include/esp8684/rom/spi_flash.h
+++ b/components/esp_rom/include/esp8684/rom/spi_flash.h
@@ -16,14 +16,6 @@
 extern "C" {
 #endif
 
-/** \defgroup spi_flash_apis, spi flash operation related apis
-  * @brief spi_flash apis
-  */
-
-/** @addtogroup spi_flash_apis
-  * @{
-  */
-
 #define PERIPHS_SPI_FLASH_CMD                 SPI_MEM_CMD_REG(1)
 #define PERIPHS_SPI_FLASH_ADDR                SPI_MEM_ADDR_REG(1)
 #define PERIPHS_SPI_FLASH_CTRL                SPI_MEM_CTRL_REG(1)
@@ -78,445 +70,21 @@ extern "C" {
 
 #define FLASH_ID_GD25LQ32C  0xC86016
 
-typedef enum {
-    ESP_ROM_SPIFLASH_QIO_MODE = 0,
-    ESP_ROM_SPIFLASH_QOUT_MODE,
-    ESP_ROM_SPIFLASH_DIO_MODE,
-    ESP_ROM_SPIFLASH_DOUT_MODE,
-    ESP_ROM_SPIFLASH_FASTRD_MODE,
-    ESP_ROM_SPIFLASH_SLOWRD_MODE
-} esp_rom_spiflash_read_mode_t;
-
 typedef enum {
     ESP_ROM_SPIFLASH_RESULT_OK,
     ESP_ROM_SPIFLASH_RESULT_ERR,
     ESP_ROM_SPIFLASH_RESULT_TIMEOUT
 } esp_rom_spiflash_result_t;
 
-typedef struct {
-    uint32_t device_id;
-    uint32_t chip_size;    // chip size in bytes
-    uint32_t block_size;
-    uint32_t sector_size;
-    uint32_t page_size;
-    uint32_t status_mask;
-} esp_rom_spiflash_chip_t;
-
-typedef struct {
-    uint8_t  data_length;
-    uint8_t  read_cmd0;
-    uint8_t  read_cmd1;
-    uint8_t  write_cmd;
-    uint16_t data_mask;
-    uint16_t data;
-} esp_rom_spiflash_common_cmd_t;
-
-/**
-  * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
-  *    Please do not call this function in SDK.
-  *
-  * @param  uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
-  *
-  * @param  uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
-  *
-  * @return None
-  */
-void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
-
-/**
-  * @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
-  *    Please do not call this function in SDK.
-  *
-  * @param  uint8_t wp_gpio_num: WP gpio number.
-  *
-  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
-  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
-  *
-  * @return None
-  */
-void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
-
-/**
-  * @brief Set SPI Flash pad drivers.
-  *    Please do not call this function in SDK.
-  *
-  * @param  uint8_t wp_gpio_num: WP gpio number.
-  *
-  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
-  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
-  *
-  * @param  uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
-  *            drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
-  *                        Values usually read from falsh by rom code, function usually callde by rom code.
-  *                        if value with bit(3) set, the value is valid, bit[2:0] is the real value.
-  *
-  * @return None
-  */
-void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
-
-/**
-  * @brief Select SPI Flash function for pads.
-  *    Please do not call this function in SDK.
-  *
-  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
-  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
-  *
-  * @return None
-  */
-void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
-
-/**
-  * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
-  *    Please do not call this function in SDK.
-  *
-  * @param  uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
-  *              else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
-  *
-  * @param  uint8_t legacy: In legacy mode, more SPI command is used in line.
-  *
-  * @return None
-  */
-void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
-
-/**
-  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
-  *    Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
-  *
-  * @param  uint32_t *status : The pointer to which to return the Flash status value.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
-
-/**
-  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
-  *        Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
-  *
-  * @param  uint32_t *status : The pointer to which to return the Flash status value.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
-
-/**
-  * @brief Write status to Falsh status register.
-  *        Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
-  *
-  * @param  uint32_t status_value : Value to .
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : write error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
-
-/**
-  * @brief Use a command to Read Flash status register.
-  *        Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
-  *
-  * @param  uint32_t*status : The pointer to which to return the Flash status value.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : read error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
-
-/**
-  * @brief Config SPI Flash read mode when init.
-  *        Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
-  *
-  * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
-
-/**
-  * @brief Config SPI Flash clock divisor.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint8_t freqdiv: clock divisor.
-  *
-  * @param  uint8_t spi: 0 for SPI0, 1 for SPI1.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : config error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
-
-/**
-  * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
-  *        Please do not call this function in SDK.
-  *
-  * @param  esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
-  *
-  * @return uint16_t  0 : do not send command any more.
-  *                   1 : go to the next command.
-  *                   n > 1 : skip (n - 1) commands.
-  */
-uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
-
-/**
-  * @brief Unlock SPI write protect.
-  *        Please do not call this function in SDK.
-  *
-  * @param  None.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
-
-/**
-  * @brief SPI write protect.
-  *        Please do not call this function in SDK.
-  *
-  * @param  None.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
-
-/**
-  * @brief Update SPI Flash parameter.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t deviceId : Device ID read from SPI, the low 32 bit.
-  *
-  * @param  uint32_t chip_size : The Flash size.
-  *
-  * @param  uint32_t block_size : The Flash block size.
-  *
-  * @param  uint32_t sector_size : The Flash sector size.
-  *
-  * @param  uint32_t page_size : The Flash page size.
-  *
-  * @param  uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
-        uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
-
-/**
-  * @brief Erase whole flash chip.
-  *        Please do not call this function in SDK.
-  *
-  * @param  None
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
-
-/**
-  * @brief Erase a 64KB block of flash
-  *        Uses SPI flash command D8H.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t block_num : Which block to erase.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
-
-/**
-  * @brief Erase a sector of flash.
-  *        Uses SPI flash command 20H.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t sector_num : Which sector to erase.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
-
-/**
-  * @brief Erase some sectors.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
-  *
-  * @param  uint32_t area_len : Length to erase, should be sector aligned.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
-
-/**
-  * @brief Write Data to Flash, you should Erase it yourself if need.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t dest_addr : Address to write, should be 4 bytes aligned.
-  *
-  * @param  const uint32_t *src : The pointer to data which is to write.
-  *
-  * @param  uint32_t len : Length to write, should be 4 bytes aligned.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
-
-/**
-  * @brief Read Data from Flash, you should Erase it yourself if need.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t src_addr : Address to read, should be 4 bytes aligned.
-  *
-  * @param  uint32_t *dest : The buf to read the data.
-  *
-  * @param  uint32_t len : Length to read, should be 4 bytes aligned.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
-
-/**
-  * @brief SPI1 go into encrypto mode.
-  *        Please do not call this function in SDK.
-  *
-  * @param  None
-  *
-  * @return None
-  */
-void esp_rom_spiflash_write_encrypted_enable(void);
-
-/**
-  * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
-  *        Please do not call this function in SDK.
-  *
-  * @param  uint32_t flash_addr : Address to write, should be 32 bytes aligned.
-  *
-  * @param  uint32_t *data : The pointer to data which is to write.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
-
-/**
-  * @brief SPI1 go out of encrypto mode.
-  *        Please do not call this function in SDK.
-  *
-  * @param  None
-  *
-  * @return None
-  */
-void esp_rom_spiflash_write_encrypted_disable(void);
-
-/**
-  * @brief Write data to flash with transparent encryption.
-  * @note Sectors to be written should already be erased.
-  *
-  * @note Please do not call this function in SDK.
-  *
-  * @param  uint32_t flash_addr : Address to write, should be 32 byte aligned.
-  *
-  * @param  uint32_t *data : The pointer to data to write. Note, this pointer must
-  *                          be 32 bit aligned and the content of the data will be
-  *                          modified by the encryption function.
-  *
-  * @param  uint32_t len : Length to write, should be 32 bytes aligned.
-  *
-  * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
-  *         ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
-  *         ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
-  */
-esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
-
-
-/* TODO: figure out how to map these to their new names */
-typedef enum {
-    SPI_ENCRYPT_DESTINATION_FLASH,
-} SpiEncryptDest;
-
-typedef esp_rom_spiflash_result_t SpiFlashOpResult;
-
-SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
-SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
-void SPI_Write_Encrypt_Enable(void);
-void SPI_Write_Encrypt_Disable(void);
-
-/** @brief Wait until SPI flash write operation is complete
- *
- * @note Please do not call this function in SDK.
- *
- * Reads the Write In Progress bit of the SPI flash status register,
- * repeats until this bit is zero (indicating write complete).
- *
- * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
- *         ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
- */
-esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
-
-
-/** @brief Enable Quad I/O pin functions
- *
- * @note Please do not call this function in SDK.
- *
- * Sets the HD & WP pin functions for Quad I/O modes, based on the
- * efuse SPI pin configuration.
- *
- * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
- *
- * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
- * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
- * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
- * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
- *   to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
- *   Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
- */
-void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
-
-
 typedef void (* spi_flash_func_t)(void);
-typedef SpiFlashOpResult (* spi_flash_op_t)(void);
-typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
-typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
-typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
-typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
+typedef esp_rom_spiflash_result_t (* spi_flash_op_t)(void);
+typedef esp_rom_spiflash_result_t (* spi_flash_erase_t)(uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
+typedef esp_rom_spiflash_result_t (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
+typedef esp_rom_spiflash_result_t (* spi_flash_wren_t)(void*);
 
 typedef struct {
-    uint8_t pp_addr_bit_len;
-    uint8_t se_addr_bit_len;
-    uint8_t be_addr_bit_len;
-    uint8_t rd_addr_bit_len;
     uint32_t read_sub_len;
     uint32_t write_sub_len;
     spi_flash_op_t unlock;
@@ -530,35 +98,6 @@ typedef struct {
     spi_flash_op_t wait_idle;
 } spiflash_legacy_funcs_t;
 
-
-extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
-
-/** @brief Global ROM spiflash data, as used by legacy
-    SPI flash functions
-*/
-typedef struct {
-    esp_rom_spiflash_chip_t chip;
-    uint8_t dummy_len_plus[3];
-    uint8_t sig_matrix;
-} spiflash_legacy_data_t;
-
-extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
-
-/* Defines to make the C3 ROM legacvy data access compatible with previous chips */
-#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
-#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
-
-/**
- * @brief Clear WEL bit unconditionally.
- *
- * @return always ESP_ROM_SPIFLASH_RESULT_OK
- */
-esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
-
-/**
-  * @}
-  */
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/esp_rom/include/esp_rom_spiflash.h b/components/esp_rom/include/esp_rom_spiflash.h
index c4646a7472..aa5aaf05ce 100644
--- a/components/esp_rom/include/esp_rom_spiflash.h
+++ b/components/esp_rom/include/esp_rom_spiflash.h
@@ -11,9 +11,24 @@
 extern "C" {
 #endif
 
+#include "sdkconfig.h"
 #include <stdint.h>
 #include <stdbool.h>
 
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32H2
+#include "esp32h2/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP8684
+#include "esp32h2/rom/spi_flash.h"
+#endif
+
 /** \defgroup spi_flash_apis, spi flash operation related apis
   * @brief spi_flash apis
   */
@@ -36,12 +51,6 @@ typedef enum {
     ESP_ROM_SPIFLASH_OIO_DTR_MODE,
 } esp_rom_spiflash_read_mode_t;
 
-typedef enum {
-    ESP_ROM_SPIFLASH_RESULT_OK,
-    ESP_ROM_SPIFLASH_RESULT_ERR,
-    ESP_ROM_SPIFLASH_RESULT_TIMEOUT
-} esp_rom_spiflash_result_t;
-
 typedef struct {
     uint32_t device_id;
     uint32_t chip_size;    // chip size in bytes
diff --git a/components/esp_rom/linker.lf b/components/esp_rom/linker.lf
new file mode 100644
index 0000000000..4bf5582eb2
--- /dev/null
+++ b/components/esp_rom/linker.lf
@@ -0,0 +1,4 @@
+[mapping:esp_rom]
+archive: libesp_rom.a
+entries:
+    esp_rom_spiflash (noflash)
diff --git a/components/spi_flash/esp32/spi_flash_rom_patch.c b/components/esp_rom/patches/esp_rom_spiflash.c
similarity index 96%
rename from components/spi_flash/esp32/spi_flash_rom_patch.c
rename to components/esp_rom/patches/esp_rom_spiflash.c
index 69738a505e..d9e6cf4822 100644
--- a/components/spi_flash/esp32/spi_flash_rom_patch.c
+++ b/components/esp_rom/patches/esp_rom_spiflash.c
@@ -3,19 +3,20 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+
 #include "sdkconfig.h"
-#include "esp32/rom/spi_flash.h"
+#include "esp_rom_spiflash.h"
 #include "soc/spi_periph.h"
-#include "spi_flash_defs.h"
 #include "esp_rom_spiflash.h"
 
-
 #define SPI_IDX   1
-#define OTH_IDX   0
-
 
 extern esp_rom_spiflash_chip_t g_rom_spiflash_chip;
 
+#if CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
+
+#if CONFIG_IDF_TARGET_ESP32
+
 static inline bool is_issi_chip(const esp_rom_spiflash_chip_t* chip)
 {
     return (((chip->device_id >> 16)&0xff) == 0x9D);
@@ -24,18 +25,11 @@ static inline bool is_issi_chip(const esp_rom_spiflash_chip_t* chip)
 esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi)
 {
     uint32_t status;
-#if CONFIG_IDF_TARGET_ESP32
     //wait for spi control ready
     while ((REG_READ(SPI_EXT2_REG(1)) & SPI_ST)) {
     }
     while ((REG_READ(SPI_EXT2_REG(0)) & SPI_ST)) {
     }
-#elif CONFIG_IDF_TARGET_ESP32S2
-    while ((REG_READ(SPI_MEM_FSM_REG(1)) & SPI_MEM_ST)) {
-    }
-    while ((REG_READ(SPI_MEM_FSM_REG(0)) & SPI_MEM_ST)) {
-    }
-#endif
     //wait for flash status ready
     if ( ESP_ROM_SPIFLASH_RESULT_OK != esp_rom_spiflash_read_status(spi, &status)) {
         return ESP_ROM_SPIFLASH_RESULT_ERR;
@@ -43,7 +37,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *sp
     return  ESP_ROM_SPIFLASH_RESULT_OK;
 }
 
-
 /* Modified version of esp_rom_spiflash_unlock() that replaces version in ROM.
 
    This works around a bug where esp_rom_spiflash_unlock sometimes reads the wrong
@@ -104,10 +97,6 @@ __attribute__((__unused__)) esp_rom_spiflash_result_t esp_rom_spiflash_unlock(vo
     return ret;
 }
 
-#if CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
-
-extern uint8_t g_rom_spiflash_dummy_len_plus[];
-
 
 static esp_rom_spiflash_result_t esp_rom_spiflash_enable_write(esp_rom_spiflash_chip_t *spi);
 
@@ -118,7 +107,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip_internal(esp_rom_sp
 
     // Chip erase.
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_CE);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
 
     // check erase is finished.
     esp_rom_spiflash_wait_idle(spi);
@@ -139,7 +129,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector_internal(esp_rom_
     // sector erase  4Kbytes erase is sector erase.
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_ADDR, addr & 0xffffff);
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_SE);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
 
     esp_rom_spiflash_wait_idle(spi);
 
@@ -154,7 +145,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_erase_block_internal(esp_rom_s
     // sector erase  4Kbytes erase is sector erase.
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_ADDR, addr & 0xffffff);
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_BE);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
 
     esp_rom_spiflash_wait_idle(spi);
 
@@ -208,7 +200,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_program_page_internal(esp_rom_
             temp_bl = 0;
         }
         WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_PP);
-        while ( READ_PERI_REG(PERIPHS_SPI_FLASH_CMD ) != 0 );
+        while ( READ_PERI_REG(PERIPHS_SPI_FLASH_CMD ) != 0 ) {
+        }
 
         esp_rom_spiflash_wait_idle(spi);
     }
@@ -224,7 +217,8 @@ esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *
         while (ESP_ROM_SPIFLASH_BUSY_FLAG == (status_value & ESP_ROM_SPIFLASH_BUSY_FLAG)) {
             WRITE_PERI_REG(PERIPHS_SPI_FLASH_STATUS, 0);       // clear regisrter
             WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_RDSR);
-            while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+            while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+            }
 
             status_value = READ_PERI_REG(PERIPHS_SPI_FLASH_STATUS) & (spi->status_mask);
         }
@@ -254,7 +248,8 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t
     // update status value by status_value
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_STATUS, status_value);    // write status regisrter
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_WRSR);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
     esp_rom_spiflash_wait_idle(spi);
 
     return ESP_ROM_SPIFLASH_RESULT_OK;
@@ -285,7 +280,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_read_data(esp_rom_spiflash_chi
             REG_WRITE(SPI_MISO_DLEN_REG(1),  ((ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM << 3) - 1) << SPI_USR_MISO_DBITLEN_S);
             WRITE_PERI_REG(PERIPHS_SPI_FLASH_ADDR, temp_addr << 8);
             REG_WRITE(PERIPHS_SPI_FLASH_CMD, SPI_USR);
-            while (REG_READ(PERIPHS_SPI_FLASH_CMD) != 0);
+            while (REG_READ(PERIPHS_SPI_FLASH_CMD) != 0) {
+            }
 
             for (i = 0; i < (ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM >> 2); i++) {
                 *addr_dest++ = READ_PERI_REG(PERIPHS_SPI_FLASH_C0 + i * 4);
@@ -297,7 +293,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_read_data(esp_rom_spiflash_chi
             WRITE_PERI_REG(PERIPHS_SPI_FLASH_ADDR, temp_addr << 8);
             REG_WRITE(SPI_MISO_DLEN_REG(1),  ((ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM << 3) - 1) << SPI_USR_MISO_DBITLEN_S);
             REG_WRITE(PERIPHS_SPI_FLASH_CMD, SPI_USR);
-            while (REG_READ(PERIPHS_SPI_FLASH_CMD) != 0);
+            while (REG_READ(PERIPHS_SPI_FLASH_CMD) != 0) {
+            };
 
             remain_word_num = (0 == (temp_length & 0x3)) ? (temp_length >> 2) : (temp_length >> 2) + 1;
             for (i = 0; i < remain_word_num; i++) {
@@ -318,7 +315,8 @@ static esp_rom_spiflash_result_t esp_rom_spiflash_enable_write(esp_rom_spiflash_
 
     //enable write
     WRITE_PERI_REG(PERIPHS_SPI_FLASH_CMD, SPI_FLASH_WREN);     // enable write operation
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
 
     // make sure the flash is ready for writing
     while (ESP_ROM_SPIFLASH_WRENABLE_FLAG != (flash_status & ESP_ROM_SPIFLASH_WRENABLE_FLAG)) {
@@ -476,8 +474,9 @@ esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num)
 esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t target, const uint32_t *src_addr, int32_t len)
 {
     uint32_t  page_size;
-    uint32_t  pgm_len, pgm_num;
-    uint8_t    i;
+    uint32_t  pgm_len;
+    uint32_t  pgm_num;
+    uint32_t    i;
 
     // flash write is always 1 line currently
     REG_CLR_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_DUMMY);
@@ -679,8 +678,21 @@ esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint3
 esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
 {
     REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WRDI);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
     return ESP_ROM_SPIFLASH_RESULT_OK;
 }
 
-#endif
+#elif CONFIG_IDF_TARGET_ESP32S2
+
+esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
+{
+    REG_WRITE(SPI_MEM_CMD_REG(SPI_IDX), SPI_MEM_FLASH_WRDI);
+    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) {
+    }
+    return ESP_ROM_SPIFLASH_RESULT_OK;
+}
+
+#endif // IDF_TARGET
+
+#endif // CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c
index eae13483b4..d921aeaa82 100644
--- a/components/esp_system/port/cpu_start.c
+++ b/components/esp_system/port/cpu_start.c
@@ -86,8 +86,6 @@
 
 #if CONFIG_APP_BUILD_TYPE_ELF_RAM
 #include "esp_rom_spiflash.h"
-#elif CONFIG_IDF_TARGET_ESP8684
-#include "esp8684/rom/spi_flash.h"
 #endif // CONFIG_APP_BUILD_TYPE_ELF_RAM
 
 // Set efuse ROM_LOG_MODE on first boot
diff --git a/components/spi_flash/CMakeLists.txt b/components/spi_flash/CMakeLists.txt
index 51406d2e72..364c35f610 100644
--- a/components/spi_flash/CMakeLists.txt
+++ b/components/spi_flash/CMakeLists.txt
@@ -1,6 +1,5 @@
 idf_build_get_property(target IDF_TARGET)
 if(BOOTLOADER_BUILD)
-    set(srcs "${target}/spi_flash_rom_patch.c")
     set(cache_srcs "")
     set(priv_requires bootloader_support soc)
 else()
@@ -12,7 +11,6 @@ else()
     )
     set(srcs
         "partition.c"
-        "${target}/spi_flash_rom_patch.c"
     )
 
     if(CONFIG_ESPTOOLPY_OCT_FLASH)
diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c
index 13b9543695..f3e4c349f8 100644
--- a/components/spi_flash/cache_utils.c
+++ b/components/spi_flash/cache_utils.c
@@ -32,7 +32,6 @@
 #include "soc/extmem_reg.h"
 #include "soc/cache_memory.h"
 #elif CONFIG_IDF_TARGET_ESP8684
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/cache.h"
 #include "soc/extmem_reg.h"
 #include "soc/cache_memory.h"
diff --git a/components/spi_flash/esp32/flash_ops_esp32.c b/components/spi_flash/esp32/flash_ops_esp32.c
index 2ae5b8fe54..e9ede64ded 100644
--- a/components/spi_flash/esp32/flash_ops_esp32.c
+++ b/components/spi_flash/esp32/flash_ops_esp32.c
@@ -5,7 +5,6 @@
  */
 #include <string.h>
 #include "esp_spi_flash.h"
-#include "esp32/rom/spi_flash.h"
 #include "esp32/rom/cache.h"
 #include "esp_rom_spiflash.h"
 
diff --git a/components/spi_flash/esp32c3/flash_ops_esp32c3.c b/components/spi_flash/esp32c3/flash_ops_esp32c3.c
index 8765cfc6a9..bdaa223ae5 100644
--- a/components/spi_flash/esp32c3/flash_ops_esp32c3.c
+++ b/components/spi_flash/esp32c3/flash_ops_esp32c3.c
@@ -10,7 +10,6 @@
 #include "esp_spi_flash.h"
 #include "soc/system_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp32c3/rom/spi_flash.h"
 #include "esp32c3/rom/cache.h"
 #include "hal/spi_flash_hal.h"
 #include "esp_flash.h"
diff --git a/components/spi_flash/esp32c3/spi_flash_rom_patch.c b/components/spi_flash/esp32c3/spi_flash_rom_patch.c
deleted file mode 100644
index c272b3fb62..0000000000
--- a/components/spi_flash/esp32c3/spi_flash_rom_patch.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "sdkconfig.h"
-#include "esp32c3/rom/spi_flash.h"
-#include "soc/spi_periph.h"
-#include "spi_flash_defs.h"
-#include "esp_rom_spiflash.h"
-
-#define SPI_IDX   1
-
-esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
-{
-    REG_WRITE(SPI_MEM_CMD_REG(SPI_IDX), SPI_MEM_FLASH_WRDI);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
-    return ESP_ROM_SPIFLASH_RESULT_OK;
-}
diff --git a/components/spi_flash/esp32h2/flash_ops_esp32h2.c b/components/spi_flash/esp32h2/flash_ops_esp32h2.c
index e69733898e..ef1b5581a0 100644
--- a/components/spi_flash/esp32h2/flash_ops_esp32h2.c
+++ b/components/spi_flash/esp32h2/flash_ops_esp32h2.c
@@ -10,7 +10,6 @@
 #include "esp_spi_flash.h"
 #include "soc/system_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp32h2/rom/spi_flash.h"
 #include "esp32h2/rom/cache.h"
 #include "hal/spi_flash_hal.h"
 #include "esp_flash.h"
diff --git a/components/spi_flash/esp32h2/spi_flash_rom_patch.c b/components/spi_flash/esp32h2/spi_flash_rom_patch.c
deleted file mode 100644
index cc2dcd5a64..0000000000
--- a/components/spi_flash/esp32h2/spi_flash_rom_patch.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "sdkconfig.h"
-#include "esp32h2/rom/spi_flash.h"
-#include "soc/spi_periph.h"
-#include "spi_flash_defs.h"
-#include "esp_rom_spiflash.h"
-
-#define SPI_IDX   1
-
-esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
-{
-    REG_WRITE(SPI_MEM_CMD_REG(SPI_IDX), SPI_MEM_FLASH_WRDI);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
-    return ESP_ROM_SPIFLASH_RESULT_OK;
-}
diff --git a/components/spi_flash/esp32s2/flash_ops_esp32s2.c b/components/spi_flash/esp32s2/flash_ops_esp32s2.c
index cf80475194..639637ca19 100644
--- a/components/spi_flash/esp32s2/flash_ops_esp32s2.c
+++ b/components/spi_flash/esp32s2/flash_ops_esp32s2.c
@@ -10,7 +10,6 @@
 #include "esp_spi_flash.h"
 #include "soc/system_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/cache.h"
 #include "bootloader_flash.h"
 #include "hal/spi_flash_hal.h"
diff --git a/components/spi_flash/esp32s2/spi_flash_rom_patch.c b/components/spi_flash/esp32s2/spi_flash_rom_patch.c
deleted file mode 100644
index 23ee08e56c..0000000000
--- a/components/spi_flash/esp32s2/spi_flash_rom_patch.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "sdkconfig.h"
-#include "esp32s2/rom/spi_flash.h"
-#include "soc/spi_periph.h"
-#include "spi_flash_defs.h"
-#include "esp_rom_spiflash.h"
-
-
-#define SPI_IDX   1
-extern esp_rom_spiflash_chip_t g_rom_spiflash_chip;
-
-esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
-{
-    REG_WRITE(SPI_MEM_CMD_REG(SPI_IDX), SPI_MEM_FLASH_WRDI);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
-    return ESP_ROM_SPIFLASH_RESULT_OK;
-}
diff --git a/components/spi_flash/esp32s3/flash_ops_esp32s3.c b/components/spi_flash/esp32s3/flash_ops_esp32s3.c
index f4891fbdbe..a2c0709266 100644
--- a/components/spi_flash/esp32s3/flash_ops_esp32s3.c
+++ b/components/spi_flash/esp32s3/flash_ops_esp32s3.c
@@ -10,7 +10,6 @@
 #include "esp_spi_flash.h"
 #include "soc/system_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "esp32s3/rom/cache.h"
 #include "bootloader_flash.h"
 #include "hal/spi_flash_hal.h"
diff --git a/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c b/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c
index 41682cd431..8f25c714b2 100644
--- a/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c
+++ b/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c
@@ -9,7 +9,6 @@
 #include "esp_err.h"
 #include "esp_rom_gpio.h"
 #include "esp32s3/rom/gpio.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "esp_rom_spiflash.h"
 #include "esp32s3/rom/opi_flash.h"
 #include "esp_private/spi_flash_os.h"
diff --git a/components/spi_flash/esp32s3/spi_flash_rom_patch.c b/components/spi_flash/esp32s3/spi_flash_rom_patch.c
deleted file mode 100644
index a3a6079529..0000000000
--- a/components/spi_flash/esp32s3/spi_flash_rom_patch.c
+++ /dev/null
@@ -1,6 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-// We keep this file here only for future use
diff --git a/components/spi_flash/esp32s3/spi_timing_config.h b/components/spi_flash/esp32s3/spi_timing_config.h
index a8d064d491..ed6f103308 100644
--- a/components/spi_flash/esp32s3/spi_timing_config.h
+++ b/components/spi_flash/esp32s3/spi_timing_config.h
@@ -7,7 +7,6 @@
 #pragma once
 
 #include "esp_flash_partitions.h"
-#include "esp32s3/rom/spi_flash.h"
 #include "esp_rom_spiflash.h"
 #include "esp32s3/rom/opi_flash.h"
 #include "mspi_timing_tuning_configs.h"
diff --git a/components/spi_flash/esp8684/flash_ops_esp8684.c b/components/spi_flash/esp8684/flash_ops_esp8684.c
index b90f90215e..ad62448c62 100644
--- a/components/spi_flash/esp8684/flash_ops_esp8684.c
+++ b/components/spi_flash/esp8684/flash_ops_esp8684.c
@@ -10,14 +10,14 @@
 #include "esp_spi_flash.h"
 #include "soc/system_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp8684/rom/spi_flash.h"
 #include "esp8684/rom/cache.h"
 #include "hal/spi_flash_hal.h"
 #include "esp_flash.h"
 #include "esp_log.h"
 #include "esp_attr.h"
+#include "esp_rom_spiflash.h"
 
-static const char *TAG = "spiflash_c3";
+static const char *TAG = "spiflash_8684";
 
 #define SPICACHE SPIMEM0
 #define SPIFLASH SPIMEM1
diff --git a/components/spi_flash/esp8684/spi_flash_rom_patch.c b/components/spi_flash/esp8684/spi_flash_rom_patch.c
deleted file mode 100644
index a48d22222b..0000000000
--- a/components/spi_flash/esp8684/spi_flash_rom_patch.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "sdkconfig.h"
-#include "esp8684/rom/spi_flash.h"
-#include "soc/spi_periph.h"
-#include "spi_flash_defs.h"
-
-#define SPI_IDX   1
-
-esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void)
-{
-    REG_WRITE(SPI_MEM_CMD_REG(SPI_IDX), SPI_MEM_FLASH_WRDI);
-    while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0);
-    return ESP_ROM_SPIFLASH_RESULT_OK;
-}
diff --git a/components/spi_flash/esp_flash_api.c b/components/spi_flash/esp_flash_api.c
index ba13b7f132..a432e1267a 100644
--- a/components/spi_flash/esp_flash_api.c
+++ b/components/spi_flash/esp_flash_api.c
@@ -20,8 +20,6 @@
 #if CONFIG_IDF_TARGET_ESP32S2
 #include "esp_crypto_lock.h" // for locking flash encryption peripheral
 #endif //CONFIG_IDF_TARGET_ESP32S2
-#elif CONFIG_IDF_TARGET_ESP8684
-#include "esp8684/rom/spi_flash.h"
 
 static const char TAG[] = "spi_flash";
 
diff --git a/components/spi_flash/esp_flash_spi_init.c b/components/spi_flash/esp_flash_spi_init.c
index 22cd9fa04c..58ecbc68c6 100644
--- a/components/spi_flash/esp_flash_spi_init.c
+++ b/components/spi_flash/esp_flash_spi_init.c
@@ -21,7 +21,6 @@
 #include "esp_rom_gpio.h"
 #include "esp_private/spi_flash_os.h"
 #include "esp_rom_spiflash.h"
-#include "esp32c3/rom/efuse.h"
 
 __attribute__((unused)) static const char TAG[] = "spi_flash";
 
diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c
index 2315d5f91c..9364399fdb 100644
--- a/components/spi_flash/flash_mmap.c
+++ b/components/spi_flash/flash_mmap.c
@@ -52,7 +52,6 @@
 #include "soc/mmu.h"
 #elif CONFIG_IDF_TARGET_ESP8684
 #include "esp8684/rom/cache.h"
-#include "esp8684/rom/spi_flash.h"
 #include "soc/cache_memory.h"
 #include "soc/mmu.h"
 #endif
diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c
index d6381a2054..db39129f9f 100644
--- a/components/spi_flash/flash_ops.c
+++ b/components/spi_flash/flash_ops.c
@@ -24,7 +24,6 @@
 #include "esp_private/esp_clk.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/cache.h"
-#include "esp32/rom/spi_flash.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/cache.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
@@ -38,7 +37,6 @@
 #include "esp32h2/rom/cache.h"
 #elif CONFIG_IDF_TARGET_ESP8684
 #include "esp8684/rom/cache.h"
-#include "esp8684/rom/spi_flash.h"
 #endif
 #include "esp_rom_spiflash.h"
 #include "esp_flash_partitions.h"
diff --git a/components/spi_flash/linker.lf b/components/spi_flash/linker.lf
index fdba7df429..5062c9bd97 100644
--- a/components/spi_flash/linker.lf
+++ b/components/spi_flash/linker.lf
@@ -1,7 +1,6 @@
 [mapping:spi_flash]
 archive: libspi_flash.a
 entries:
-    spi_flash_rom_patch (noflash)
     spi_flash_chip_generic (noflash)
     spi_flash_chip_issi (noflash)
     spi_flash_chip_mxic (noflash)
diff --git a/components/spi_flash/sim/flash_mock_util.c b/components/spi_flash/sim/flash_mock_util.c
index 62c0146272..a6c1a0dd60 100644
--- a/components/spi_flash/sim/flash_mock_util.c
+++ b/components/spi_flash/sim/flash_mock_util.c
@@ -2,7 +2,6 @@
 #include "esp_partition.h"
 
 #include "esp_err.h"
-#include "esp32/rom/spi_flash.h"
 #include "esp_rom_spiflash.h"
 
 bool spi_flash_check_and_flush_cache(size_t start_addr, size_t length)
diff --git a/components/spi_flash/test/test_read_write.c b/components/spi_flash/test/test_read_write.c
index 76f4201c1f..e31c94ff36 100644
--- a/components/spi_flash/test/test_read_write.c
+++ b/components/spi_flash/test/test_read_write.c
@@ -18,10 +18,6 @@
 #include "../cache_utils.h"
 #include "soc/timer_periph.h"
 #include "esp_heap_caps.h"
-
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/spi_flash.h"
-#endif
 #include "esp_rom_spiflash.h"
 
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
diff --git a/components/spiffs/esp_spiffs.c b/components/spiffs/esp_spiffs.c
index 6315f161e4..223d09d75e 100644
--- a/components/spiffs/esp_spiffs.c
+++ b/components/spiffs/esp_spiffs.c
@@ -22,8 +22,6 @@
 #include "esp_vfs.h"
 #include "esp_err.h"
 #include "esp_rom_spiflash.h"
-#elif CONFIG_IDF_TARGET_ESP8684
-#include "esp8684/rom/spi_flash.h"
 
 #include "spiffs_api.h"