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feat(efuse): Support efuses for ESP32-C5 ECO2

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Konstantin Kondrashov
2025-05-06 18:25:43 +03:00
parent 565cca2fee
commit 3a72305e50
12 changed files with 888 additions and 299 deletions
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370
components/efuse/esp32c5/esp_efuse_table.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,7 +9,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table b26e7466c400977081a142076ef1a5bb
// md5_digest_table 0c453d200f282e320677c1ac46786658
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -143,8 +143,8 @@ static const esp_efuse_desc_t WR_DIS_XTS_DPA_CLK_ENABLE[] = {
{EFUSE_BLK0, 14, 1}, // [] wr_dis of XTS_DPA_CLK_ENABLE,
};
static const esp_efuse_desc_t WR_DIS_ECDSA_DISABLE_P192[] = {
{EFUSE_BLK0, 14, 1}, // [] wr_dis of ECDSA_DISABLE_P192,
static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_SHA384_EN[] = {
{EFUSE_BLK0, 14, 1}, // [] wr_dis of SECURE_BOOT_SHA384_EN,
};
static const esp_efuse_desc_t WR_DIS_ECC_FORCE_CONST_TIME[] = {
@@ -315,6 +315,14 @@ static const esp_efuse_desc_t WR_DIS_LP_HP_DBIAS_VOL_GAP[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of LP_HP_DBIAS_VOL_GAP,
};
static const esp_efuse_desc_t WR_DIS_REF_CURR_CODE[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of REF_CURR_CODE,
};
static const esp_efuse_desc_t WR_DIS_RES_TUNE_CODE[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of RES_TUNE_CODE,
};
static const esp_efuse_desc_t WR_DIS_OPTIONAL_UNIQUE_ID[] = {
{EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
};
@@ -463,156 +471,176 @@ static const esp_efuse_desc_t RD_DIS_BLOCK_SYS_DATA2[] = {
{EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2,
};
static const esp_efuse_desc_t BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI[] = {
{EFUSE_BLK0, 39, 1}, // [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the high part of the field),
};
static const esp_efuse_desc_t DIS_ICACHE[] = {
{EFUSE_BLK0, 40, 1}, // [] Represents whether icache is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 40, 1}, // [] Represents whether cache is disabled. 1: Disabled 0: Enabled,
};
static const esp_efuse_desc_t DIS_USB_JTAG[] = {
{EFUSE_BLK0, 41, 1}, // [] Represents whether the function of usb switch to jtag is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 41, 1}, // [] Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} is available only when \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} is configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Disabled0: Enabled,
};
static const esp_efuse_desc_t BOOTLOADER_ANTI_ROLLBACK_EN[] = {
{EFUSE_BLK0, 42, 1}, // [] Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled,
};
static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
{EFUSE_BLK0, 44, 1}, // [] Represents whether the function that forces chip into download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 44, 1}, // [] Represents whether the function that forces chip into Download mode is disabled. 1: Disabled0: Enabled,
};
static const esp_efuse_desc_t SPI_DOWNLOAD_MSPI_DIS[] = {
{EFUSE_BLK0, 45, 1}, // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 45, 1}, // [] Represents whether SPI0 controller during boot\_mode\_download is disabled.0: Enabled1: Disabled,
};
static const esp_efuse_desc_t DIS_TWAI[] = {
{EFUSE_BLK0, 46, 1}, // [] Represents whether TWAI function is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 46, 1}, // [] Represents whether TWAI$^®$ function is disabled.1: Disabled0: Enabled,
};
static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
{EFUSE_BLK0, 47, 1}, // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled.\\ 1: enabled\\ 0: disabled,
{EFUSE_BLK0, 47, 1}, // [] Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of \hyperref[fielddesc:EFUSEDISPADJTAG]{EFUSE\_DIS\_PAD\_JTAG}; \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} and \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} are configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Enabled0: Disabled,
};
static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
{EFUSE_BLK0, 48, 3}, // [] Represents whether JTAG is disabled in soft way.\\ Odd number: disabled\\ Even number: enabled,
{EFUSE_BLK0, 48, 3}, // [] Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: DisabledEven count of bits with a value of 1: Enabled,
};
static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
{EFUSE_BLK0, 51, 1}, // [] Represents whether JTAG is disabled in the hard way(permanently).\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 51, 1}, // [] Represents whether PAD JTAG is disabled in the hard way (permanently).1: Disabled0: Enabled,
};
static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
{EFUSE_BLK0, 52, 1}, // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode).\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 52, 1}, // [] Represents whether flash encryption is disabled (except in SPI boot mode).1: Disabled0: Enabled,
};
static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
{EFUSE_BLK0, 57, 1}, // [] Represents whether the D+ and D- pins is exchanged.\\ 1: exchanged\\ 0: not exchanged,
{EFUSE_BLK0, 57, 1}, // [] Represents whether the D+ and D- pins is exchanged.1: Exchanged0: Not exchanged,
};
static const esp_efuse_desc_t VDD_SPI_AS_GPIO[] = {
{EFUSE_BLK0, 58, 1}, // [] Represents whether vdd spi pin is functioned as gpio.\\ 1: functioned\\ 0: not functioned,
};
static const esp_efuse_desc_t KM_DISABLE_DEPLOY_MODE[] = {
{EFUSE_BLK0, 64, 4}, // [] Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.,
};
static const esp_efuse_desc_t KM_RND_SWITCH_CYCLE[] = {
{EFUSE_BLK0, 68, 2}, // [] Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles,
};
static const esp_efuse_desc_t KM_DEPLOY_ONLY_ONCE[] = {
{EFUSE_BLK0, 70, 4}, // [] Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds,
};
static const esp_efuse_desc_t FORCE_USE_KEY_MANAGER_KEY[] = {
{EFUSE_BLK0, 74, 4}, // [] Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds,
};
static const esp_efuse_desc_t FORCE_DISABLE_SW_INIT_KEY[] = {
{EFUSE_BLK0, 78, 1}, // [] Set this bit to disable software written init key; and force use efuse_init_key,
{EFUSE_BLK0, 58, 1}, // [] Represents whether VDD SPI pin is functioned as GPIO.1: Functioned0: Not functioned,
};
static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
{EFUSE_BLK0, 80, 2}, // [] Represents the threshold level of the RTC watchdog STG0 timeout.\\ 0: Original threshold configuration value of STG0 *2 \\1: Original threshold configuration value of STG0 *4 \\2: Original threshold configuration value of STG0 *8 \\3: Original threshold configuration value of STG0 *16,
{EFUSE_BLK0, 59, 2}, // [] Represents RTC watchdog timeout threshold.0: The originally configured STG0 threshold × 21: The originally configured STG0 threshold × 42: The originally configured STG0 threshold × 83: The originally configured STG0 threshold × 16,
};
static const esp_efuse_desc_t BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO[] = {
{EFUSE_BLK0, 61, 3}, // [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the low part of the field),
};
static const esp_efuse_desc_t KM_DISABLE_DEPLOY_MODE[] = {
{EFUSE_BLK0, 64, 4}, // [] Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled,
};
static const esp_efuse_desc_t KM_RND_SWITCH_CYCLE[] = {
{EFUSE_BLK0, 68, 2}, // [] Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles,
};
static const esp_efuse_desc_t KM_DEPLOY_ONLY_ONCE[] = {
{EFUSE_BLK0, 70, 4}, // [] Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once,
};
static const esp_efuse_desc_t FORCE_USE_KEY_MANAGER_KEY[] = {
{EFUSE_BLK0, 74, 4}, // [] Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager,
};
static const esp_efuse_desc_t FORCE_DISABLE_SW_INIT_KEY[] = {
{EFUSE_BLK0, 78, 1}, // [] Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable,
};
static const esp_efuse_desc_t BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM[] = {
{EFUSE_BLK0, 79, 1}, // [] Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable,
};
static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
{EFUSE_BLK0, 82, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"},
{EFUSE_BLK0, 80, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"},
};
static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
{EFUSE_BLK0, 85, 1}, // [] Revoke 1st secure boot key,
{EFUSE_BLK0, 83, 1}, // [] Revoke 1st secure boot key,
};
static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
{EFUSE_BLK0, 86, 1}, // [] Revoke 2nd secure boot key,
{EFUSE_BLK0, 84, 1}, // [] Revoke 2nd secure boot key,
};
static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
{EFUSE_BLK0, 87, 1}, // [] Revoke 3rd secure boot key,
{EFUSE_BLK0, 85, 1}, // [] Revoke 3rd secure boot key,
};
static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
{EFUSE_BLK0, 88, 4}, // [KEY0_PURPOSE] Represents the purpose of Key0,
{EFUSE_BLK0, 86, 5}, // [KEY0_PURPOSE] Represents the purpose of Key0. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
{EFUSE_BLK0, 92, 4}, // [KEY1_PURPOSE] Represents the purpose of Key1,
{EFUSE_BLK0, 91, 5}, // [KEY1_PURPOSE] Represents the purpose of Key1. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
{EFUSE_BLK0, 96, 4}, // [KEY2_PURPOSE] Represents the purpose of Key2,
{EFUSE_BLK0, 96, 5}, // [KEY2_PURPOSE] Represents the purpose of Key2. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
{EFUSE_BLK0, 100, 4}, // [KEY3_PURPOSE] Represents the purpose of Key3,
{EFUSE_BLK0, 101, 5}, // [KEY3_PURPOSE] Represents the purpose of Key3. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
{EFUSE_BLK0, 104, 4}, // [KEY4_PURPOSE] Represents the purpose of Key4,
{EFUSE_BLK0, 106, 5}, // [KEY4_PURPOSE] Represents the purpose of Key4. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
{EFUSE_BLK0, 108, 4}, // [KEY5_PURPOSE] Represents the purpose of Key5,
{EFUSE_BLK0, 111, 5}, // [KEY5_PURPOSE] Represents the purpose of Key5. See Table \ref{tab:efuse-key-purpose},
};
static const esp_efuse_desc_t SEC_DPA_LEVEL[] = {
{EFUSE_BLK0, 112, 2}, // [] Represents the spa secure level by configuring the clock random divide mode,
{EFUSE_BLK0, 116, 2}, // [] Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode.0: Security level is SEC\_DPA\_OFF1: Security level is SEC\_DPA\_LOW2: Security level is SEC\_DPA\_MIDDLE3: Security level is SEC\_DPA\_HIGHFor more information; please refer to Chapter \ref{mod:sysreg} \textit{\nameref{mod:sysreg}} > Section \ref{sec:sysreg-anti-dpa-attack-security-control} \textit{\nameref{sec:sysreg-anti-dpa-attack-security-control}}.,
};
static const esp_efuse_desc_t RECOVERY_BOOTLOADER_FLASH_SECTOR_HI[] = {
{EFUSE_BLK0, 118, 3}, // [] Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The high part of the field),
};
static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
{EFUSE_BLK0, 116, 1}, // [] Represents whether secure boot is enabled or disabled.\\ 1: enabled\\ 0: disabled,
{EFUSE_BLK0, 121, 1}, // [] Represents whether Secure Boot is enabled.1: Enabled0: Disabled,
};
static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
{EFUSE_BLK0, 117, 1}, // [] Represents whether revoking aggressive secure boot is enabled or disabled.\\ 1: enabled.\\ 0: disabled,
{EFUSE_BLK0, 122, 1}, // [] Represents whether aggressive revocation of Secure Boot is enabled.1: Enabled0: Disabled,
};
static const esp_efuse_desc_t KM_XTS_KEY_LENGTH_256[] = {
{EFUSE_BLK0, 123, 1}, // [] Set this bitto configure flash encryption use xts-128 key. else use xts-256 key,
{EFUSE_BLK0, 123, 1}, // [] Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key,
};
static const esp_efuse_desc_t FLASH_TPUW[] = {
{EFUSE_BLK0, 124, 4}, // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value,
{EFUSE_BLK0, 124, 4}, // [] Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms,
};
static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 128, 1}, // [] Represents whether Download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 128, 1}, // [] Represents whether Download mode is disable or enable. 1. Disable 0: Enable,
};
static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
{EFUSE_BLK0, 129, 1}, // [] Represents whether direct boot mode is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 129, 1}, // [] Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable,
};
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
{EFUSE_BLK0, 130, 1}, // [] Represents whether print from USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 130, 1}, // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable,
};
static const esp_efuse_desc_t LOCK_KM_KEY[] = {
{EFUSE_BLK0, 131, 1}, // [] Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock,
{EFUSE_BLK0, 131, 1}, // [] Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked,
};
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled.\\ 1: Disable\\ 0: Enable,
{EFUSE_BLK0, 132, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable,
};
static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
{EFUSE_BLK0, 133, 1}, // [] Represents whether security download is enabled or disabled.\\ 1: enabled\\ 0: disabled,
{EFUSE_BLK0, 133, 1}, // [] Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported).1: Enabled0: Disabled,
};
static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
@@ -620,31 +648,35 @@ static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
};
static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
{EFUSE_BLK0, 136, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot.\\ 1: forced\\ 0:not forced,
{EFUSE_BLK0, 136, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot.1: Forced. 0: Not forced.,
};
static const esp_efuse_desc_t SECURE_VERSION[] = {
{EFUSE_BLK0, 137, 16}, // [] Represents the version used by ESP-IDF anti-rollback feature,
{EFUSE_BLK0, 137, 9}, // [] Represents the app secure version used by ESP-IDF anti-rollback feature,
};
static const esp_efuse_desc_t SECURE_BOOT_DISABLE_FAST_WAKE[] = {
{EFUSE_BLK0, 153, 1}, // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled,
{EFUSE_BLK0, 153, 1}, // [] Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled.1: Disabled0: Enabled,
};
static const esp_efuse_desc_t HYS_EN_PAD[] = {
{EFUSE_BLK0, 154, 1}, // [] Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled,
{EFUSE_BLK0, 154, 1}, // [] Represents whether the hysteresis function of PAD0 – PAD27 is enabled.1: Enabled0: Disabled,
};
static const esp_efuse_desc_t XTS_DPA_PSEUDO_LEVEL[] = {
{EFUSE_BLK0, 155, 2}, // [] Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled,
{EFUSE_BLK0, 155, 2}, // [] Represents the pseudo round level of XTS-AES anti-DPA attack.0: Disabled1: Low2: Moderate3: High,
};
static const esp_efuse_desc_t XTS_DPA_CLK_ENABLE[] = {
{EFUSE_BLK0, 157, 1}, // [] Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.,
{EFUSE_BLK0, 157, 1}, // [] Represents whether XTS-AES anti-DPA attack clock is enabled.0: Disable1: Enabled,
};
static const esp_efuse_desc_t SECURE_BOOT_SHA384_EN[] = {
{EFUSE_BLK0, 159, 1}, // [] Represents if the chip supports Secure Boot using SHA-384,
};
static const esp_efuse_desc_t HUK_GEN_STATE[] = {
{EFUSE_BLK0, 160, 9}, // [] Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.,
{EFUSE_BLK0, 160, 9}, // [] Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid,
};
static const esp_efuse_desc_t XTAL_48M_SEL[] = {
@@ -652,15 +684,15 @@ static const esp_efuse_desc_t XTAL_48M_SEL[] = {
};
static const esp_efuse_desc_t XTAL_48M_SEL_MODE[] = {
{EFUSE_BLK0, 172, 1}, // [] Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state,
};
static const esp_efuse_desc_t ECDSA_DISABLE_P192[] = {
{EFUSE_BLK0, 173, 1}, // [] Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable,
{EFUSE_BLK0, 172, 1}, // [] Represents what determines the XTAL frequency in \textbf{Joint Download Boot} mode. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.0: Strapping PAD state1: \hyperref[fielddesc:EFUSEXTAL48MSEL]{EFUSE\_XTAL\_48M\_SEL} in eFuse,
};
static const esp_efuse_desc_t ECC_FORCE_CONST_TIME[] = {
{EFUSE_BLK0, 174, 1}, // [] Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable,
{EFUSE_BLK0, 173, 1}, // [] Represents whether to force ECC to use constant-time mode for point multiplication calculation. 0: Not force1: Force,
};
static const esp_efuse_desc_t RECOVERY_BOOTLOADER_FLASH_SECTOR_LO[] = {
{EFUSE_BLK0, 174, 9}, // [] Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The low part of the field),
};
static const esp_efuse_desc_t MAC[] = {
@@ -764,6 +796,14 @@ static const esp_efuse_desc_t LP_HP_DBIAS_VOL_GAP[] = {
{EFUSE_BLK1, 129, 5}, // [] DBIAS gap between LP and HP,
};
static const esp_efuse_desc_t REF_CURR_CODE[] = {
{EFUSE_BLK1, 134, 4}, // [] REF PADC Calibration Curr,
};
static const esp_efuse_desc_t RES_TUNE_CODE[] = {
{EFUSE_BLK1, 138, 5}, // [] RES PADC Calibration Tune,
};
static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
{EFUSE_BLK2, 0, 128}, // [] Optional unique 128-bit ID,
};
@@ -1032,8 +1072,8 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_XTS_DPA_CLK_ENABLE[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ECDSA_DISABLE_P192[] = {
&WR_DIS_ECDSA_DISABLE_P192[0], // [] wr_dis of ECDSA_DISABLE_P192
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_SHA384_EN[] = {
&WR_DIS_SECURE_BOOT_SHA384_EN[0], // [] wr_dis of SECURE_BOOT_SHA384_EN
NULL
};
@@ -1247,6 +1287,16 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LP_HP_DBIAS_VOL_GAP[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_REF_CURR_CODE[] = {
&WR_DIS_REF_CURR_CODE[0], // [] wr_dis of REF_CURR_CODE
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RES_TUNE_CODE[] = {
&WR_DIS_RES_TUNE_CODE[0], // [] wr_dis of RES_TUNE_CODE
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OPTIONAL_UNIQUE_ID[] = {
&WR_DIS_OPTIONAL_UNIQUE_ID[0], // [] wr_dis of OPTIONAL_UNIQUE_ID
NULL
@@ -1432,88 +1482,108 @@ const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI[] = {
&BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI[0], // [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the high part of the field)
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
&DIS_ICACHE[0], // [] Represents whether icache is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_ICACHE[0], // [] Represents whether cache is disabled. 1: Disabled 0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
&DIS_USB_JTAG[0], // [] Represents whether the function of usb switch to jtag is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_USB_JTAG[0], // [] Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} is available only when \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} is configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_EN[] = {
&BOOTLOADER_ANTI_ROLLBACK_EN[0], // [] Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
&DIS_FORCE_DOWNLOAD[0], // [] Represents whether the function that forces chip into download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_FORCE_DOWNLOAD[0], // [] Represents whether the function that forces chip into Download mode is disabled. 1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SPI_DOWNLOAD_MSPI_DIS[] = {
&SPI_DOWNLOAD_MSPI_DIS[0], // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled
&SPI_DOWNLOAD_MSPI_DIS[0], // [] Represents whether SPI0 controller during boot\_mode\_download is disabled.0: Enabled1: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[] = {
&DIS_TWAI[0], // [] Represents whether TWAI function is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_TWAI[0], // [] Represents whether TWAI$^®$ function is disabled.1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
&JTAG_SEL_ENABLE[0], // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled.\\ 1: enabled\\ 0: disabled
&JTAG_SEL_ENABLE[0], // [] Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of \hyperref[fielddesc:EFUSEDISPADJTAG]{EFUSE\_DIS\_PAD\_JTAG}; \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} and \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} are configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Enabled0: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
&SOFT_DIS_JTAG[0], // [] Represents whether JTAG is disabled in soft way.\\ Odd number: disabled\\ Even number: enabled
&SOFT_DIS_JTAG[0], // [] Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: DisabledEven count of bits with a value of 1: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
&DIS_PAD_JTAG[0], // [] Represents whether JTAG is disabled in the hard way(permanently).\\ 1: disabled\\ 0: enabled
&DIS_PAD_JTAG[0], // [] Represents whether PAD JTAG is disabled in the hard way (permanently).1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
&DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode).\\ 1: disabled\\ 0: enabled
&DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] Represents whether flash encryption is disabled (except in SPI boot mode).1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
&USB_EXCHG_PINS[0], // [] Represents whether the D+ and D- pins is exchanged.\\ 1: exchanged\\ 0: not exchanged
&USB_EXCHG_PINS[0], // [] Represents whether the D+ and D- pins is exchanged.1: Exchanged0: Not exchanged
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[] = {
&VDD_SPI_AS_GPIO[0], // [] Represents whether vdd spi pin is functioned as gpio.\\ 1: functioned\\ 0: not functioned
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_DISABLE_DEPLOY_MODE[] = {
&KM_DISABLE_DEPLOY_MODE[0], // [] Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_RND_SWITCH_CYCLE[] = {
&KM_RND_SWITCH_CYCLE[0], // [] Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_DEPLOY_ONLY_ONCE[] = {
&KM_DEPLOY_ONLY_ONCE[0], // [] Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_USE_KEY_MANAGER_KEY[] = {
&FORCE_USE_KEY_MANAGER_KEY[0], // [] Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_DISABLE_SW_INIT_KEY[] = {
&FORCE_DISABLE_SW_INIT_KEY[0], // [] Set this bit to disable software written init key; and force use efuse_init_key
&VDD_SPI_AS_GPIO[0], // [] Represents whether VDD SPI pin is functioned as GPIO.1: Functioned0: Not functioned
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
&WDT_DELAY_SEL[0], // [] Represents the threshold level of the RTC watchdog STG0 timeout.\\ 0: Original threshold configuration value of STG0 *2 \\1: Original threshold configuration value of STG0 *4 \\2: Original threshold configuration value of STG0 *8 \\3: Original threshold configuration value of STG0 *16
&WDT_DELAY_SEL[0], // [] Represents RTC watchdog timeout threshold.0: The originally configured STG0 threshold × 21: The originally configured STG0 threshold × 42: The originally configured STG0 threshold × 83: The originally configured STG0 threshold × 16
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO[] = {
&BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO[0], // [] Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the low part of the field)
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_DISABLE_DEPLOY_MODE[] = {
&KM_DISABLE_DEPLOY_MODE[0], // [] Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_RND_SWITCH_CYCLE[] = {
&KM_RND_SWITCH_CYCLE[0], // [] Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_DEPLOY_ONLY_ONCE[] = {
&KM_DEPLOY_ONLY_ONCE[0], // [] Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_USE_KEY_MANAGER_KEY[] = {
&FORCE_USE_KEY_MANAGER_KEY[0], // [] Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_DISABLE_SW_INIT_KEY[] = {
&FORCE_DISABLE_SW_INIT_KEY[0], // [] Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM[] = {
&BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM[0], // [] Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable
NULL
};
@@ -1538,87 +1608,92 @@ const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
&KEY_PURPOSE_0[0], // [KEY0_PURPOSE] Represents the purpose of Key0
&KEY_PURPOSE_0[0], // [KEY0_PURPOSE] Represents the purpose of Key0. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
&KEY_PURPOSE_1[0], // [KEY1_PURPOSE] Represents the purpose of Key1
&KEY_PURPOSE_1[0], // [KEY1_PURPOSE] Represents the purpose of Key1. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
&KEY_PURPOSE_2[0], // [KEY2_PURPOSE] Represents the purpose of Key2
&KEY_PURPOSE_2[0], // [KEY2_PURPOSE] Represents the purpose of Key2. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
&KEY_PURPOSE_3[0], // [KEY3_PURPOSE] Represents the purpose of Key3
&KEY_PURPOSE_3[0], // [KEY3_PURPOSE] Represents the purpose of Key3. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
&KEY_PURPOSE_4[0], // [KEY4_PURPOSE] Represents the purpose of Key4
&KEY_PURPOSE_4[0], // [KEY4_PURPOSE] Represents the purpose of Key4. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
&KEY_PURPOSE_5[0], // [KEY5_PURPOSE] Represents the purpose of Key5
&KEY_PURPOSE_5[0], // [KEY5_PURPOSE] Represents the purpose of Key5. See Table \ref{tab:efuse-key-purpose}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[] = {
&SEC_DPA_LEVEL[0], // [] Represents the spa secure level by configuring the clock random divide mode
&SEC_DPA_LEVEL[0], // [] Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode.0: Security level is SEC\_DPA\_OFF1: Security level is SEC\_DPA\_LOW2: Security level is SEC\_DPA\_MIDDLE3: Security level is SEC\_DPA\_HIGHFor more information; please refer to Chapter \ref{mod:sysreg} \textit{\nameref{mod:sysreg}} > Section \ref{sec:sysreg-anti-dpa-attack-security-control} \textit{\nameref{sec:sysreg-anti-dpa-attack-security-control}}.
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_HI[] = {
&RECOVERY_BOOTLOADER_FLASH_SECTOR_HI[0], // [] Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The high part of the field)
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
&SECURE_BOOT_EN[0], // [] Represents whether secure boot is enabled or disabled.\\ 1: enabled\\ 0: disabled
&SECURE_BOOT_EN[0], // [] Represents whether Secure Boot is enabled.1: Enabled0: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
&SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] Represents whether revoking aggressive secure boot is enabled or disabled.\\ 1: enabled.\\ 0: disabled
&SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] Represents whether aggressive revocation of Secure Boot is enabled.1: Enabled0: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_KM_XTS_KEY_LENGTH_256[] = {
&KM_XTS_KEY_LENGTH_256[0], // [] Set this bitto configure flash encryption use xts-128 key. else use xts-256 key
&KM_XTS_KEY_LENGTH_256[0], // [] Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
&FLASH_TPUW[0], // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
&FLASH_TPUW[0], // [] Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
&DIS_DOWNLOAD_MODE[0], // [] Represents whether Download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_DOWNLOAD_MODE[0], // [] Represents whether Download mode is disable or enable. 1. Disable 0: Enable
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
&DIS_DIRECT_BOOT[0], // [] Represents whether direct boot mode is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_DIRECT_BOOT[0], // [] Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
&DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [] Represents whether print from USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled
&DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_LOCK_KM_KEY[] = {
&LOCK_KM_KEY[0], // [] Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock
&LOCK_KM_KEY[0], // [] Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
&DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled.\\ 1: Disable\\ 0: Enable
&DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
&ENABLE_SECURITY_DOWNLOAD[0], // [] Represents whether security download is enabled or disabled.\\ 1: enabled\\ 0: disabled
&ENABLE_SECURITY_DOWNLOAD[0], // [] Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported).1: Enabled0: Disabled
NULL
};
@@ -1628,37 +1703,42 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
&FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot.\\ 1: forced\\ 0:not forced
&FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot.1: Forced. 0: Not forced.
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
&SECURE_VERSION[0], // [] Represents the version used by ESP-IDF anti-rollback feature
&SECURE_VERSION[0], // [] Represents the app secure version used by ESP-IDF anti-rollback feature
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
&SECURE_BOOT_DISABLE_FAST_WAKE[0], // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled
&SECURE_BOOT_DISABLE_FAST_WAKE[0], // [] Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled.1: Disabled0: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD[] = {
&HYS_EN_PAD[0], // [] Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled
&HYS_EN_PAD[0], // [] Represents whether the hysteresis function of PAD0 – PAD27 is enabled.1: Enabled0: Disabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[] = {
&XTS_DPA_PSEUDO_LEVEL[0], // [] Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled
&XTS_DPA_PSEUDO_LEVEL[0], // [] Represents the pseudo round level of XTS-AES anti-DPA attack.0: Disabled1: Low2: Moderate3: High
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_CLK_ENABLE[] = {
&XTS_DPA_CLK_ENABLE[0], // [] Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.
&XTS_DPA_CLK_ENABLE[0], // [] Represents whether XTS-AES anti-DPA attack clock is enabled.0: Disable1: Enabled
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_SHA384_EN[] = {
&SECURE_BOOT_SHA384_EN[0], // [] Represents if the chip supports Secure Boot using SHA-384
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_HUK_GEN_STATE[] = {
&HUK_GEN_STATE[0], // [] Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.
&HUK_GEN_STATE[0], // [] Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid
NULL
};
@@ -1668,17 +1748,17 @@ const esp_efuse_desc_t* ESP_EFUSE_XTAL_48M_SEL[] = {
};
const esp_efuse_desc_t* ESP_EFUSE_XTAL_48M_SEL_MODE[] = {
&XTAL_48M_SEL_MODE[0], // [] Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_ECDSA_DISABLE_P192[] = {
&ECDSA_DISABLE_P192[0], // [] Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable
&XTAL_48M_SEL_MODE[0], // [] Represents what determines the XTAL frequency in \textbf{Joint Download Boot} mode. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.0: Strapping PAD state1: \hyperref[fielddesc:EFUSEXTAL48MSEL]{EFUSE\_XTAL\_48M\_SEL} in eFuse
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_ECC_FORCE_CONST_TIME[] = {
&ECC_FORCE_CONST_TIME[0], // [] Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable
&ECC_FORCE_CONST_TIME[0], // [] Represents whether to force ECC to use constant-time mode for point multiplication calculation. 0: Not force1: Force
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_LO[] = {
&RECOVERY_BOOTLOADER_FLASH_SECTOR_LO[0], // [] Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The low part of the field)
NULL
};
@@ -1807,6 +1887,16 @@ const esp_efuse_desc_t* ESP_EFUSE_LP_HP_DBIAS_VOL_GAP[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_REF_CURR_CODE[] = {
&REF_CURR_CODE[0], // [] REF PADC Calibration Curr
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_RES_TUNE_CODE[] = {
&RES_TUNE_CODE[0], // [] RES PADC Calibration Tune
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
&OPTIONAL_UNIQUE_ID[0], // [] Optional unique 128-bit ID
NULL