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refactor(regi2c): add LL function to control analog i2c master clock
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@@ -48,6 +48,7 @@
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#include "soc/regi2c_cpll.h"
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#include "soc/regi2c_bias.h"
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#include "esp_private/periph_ctrl.h"
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#include "hal/regi2c_ctrl_ll.h"
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static const char *TAG = "boot.esp32p4";
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@@ -92,8 +93,10 @@ static void bootloader_super_wdt_auto_feed(void)
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static inline void bootloader_hardware_init(void)
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{
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int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
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// regi2c is enabled by default on ESP32P4, do nothing
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int __DECLARE_RCC_RC_ATOMIC_ENV __attribute__ ((unused)); // To avoid build errors/warnings about __DECLARE_RCC_RC_ATOMIC_ENV
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regi2c_ctrl_ll_master_enable_clock(true);
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regi2c_ctrl_ll_master_configure_clock();
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unsigned chip_version = efuse_hal_chip_revision();
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if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
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// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
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@@ -106,6 +109,7 @@ static inline void bootloader_hardware_init(void)
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REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
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// IDF-10019 TODO: This is temporarily for ESP32P4-ECO0, please remove it when eco0 is not widly used.
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int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
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if (likely(ESP_CHIP_REV_ABOVE(chip_version, 1))) {
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spimem_flash_ll_select_clk_source(0, FLASH_CLK_SRC_SPLL);
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spimem_ctrlr_ll_set_core_clock(0, 6);
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