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refactor(regi2c): add LL function to control analog i2c master clock

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This commit is contained in:
Song Ruo Jing
2024-07-08 22:06:12 +08:00
parent a90c9101ff
commit 3aa27ae960
27 changed files with 242 additions and 189 deletions
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52
components/hal/esp32c61/include/hal/regi2c_ctrl_ll.h
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@@ -10,18 +10,54 @@
#include <stdint.h>
#include "soc/soc.h"
#include "soc/regi2c_defs.h"
#include "modem/modem_lpcon_struct.h"
#include "modem/modem_syscon_struct.h"
#include "soc/i2c_ana_mst_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable analog I2C master clock
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_enable_clock(bool en)
{
MODEM_LPCON.clk_conf.clk_i2c_mst_en = en;
}
/**
* @brief Reset analog I2C master
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_reset(void)
{
MODEM_LPCON.rst_conf.rst_i2c_mst = 1;
MODEM_LPCON.rst_conf.rst_i2c_mst = 0;
}
/**
* @brief Force enable analog I2C master clock
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_force_enable_clock(bool en)
{
MODEM_LPCON.clk_conf_force_on.clk_i2c_mst_fo = en;
}
/**
* @brief Configure analog I2C master clock
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_master_configure_clock(void)
{
MODEM_SYSCON.clk_conf.clk_i2c_mst_sel_160m = 1;
}
/**
* @brief Start BBPLL self-calibration
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibration_start(void)
{
REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH);
REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW);
REG_CLR_BIT(I2C_ANA_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH);
REG_SET_BIT(I2C_ANA_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW);
}
/**
@@ -29,8 +65,8 @@ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibrati
*/
static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibration_stop(void)
{
REG_CLR_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW);
REG_SET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH);
REG_CLR_BIT(I2C_ANA_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW);
REG_SET_BIT(I2C_ANA_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH);
}
/**
@@ -40,7 +76,7 @@ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibrati
*/
static inline __attribute__((always_inline)) bool regi2c_ctrl_ll_bbpll_calibration_is_done(void)
{
return REG_GET_BIT(I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE);
return REG_GET_BIT(I2C_ANA_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE);
}
/**
@@ -48,8 +84,7 @@ static inline __attribute__((always_inline)) bool regi2c_ctrl_ll_bbpll_calibrati
*/
static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
{
CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_SAR_FORCE_PD);
SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PU);
// TODO: IDF-9322
}
/**
@@ -57,8 +92,7 @@ static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
*/
static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
{
CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_SAR_FORCE_PU);
SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PD);
// TODO: IDF-9322
}
#ifdef __cplusplus