feat(gpio): add gpio support on ESP32C5

This commit is contained in:
gaoxu
2024-02-20 14:57:25 +08:00
parent ce4b49ae37
commit 3ac736bc95
27 changed files with 696 additions and 3323 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -64,16 +64,15 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
{
uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
uint32_t bit_mask = 1 << bit_shift;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
*pu = IOMUX.gpio[gpio_num].fun_wpu;
*pd = IOMUX.gpio[gpio_num].fun_wpd;
*ie = IOMUX.gpio[gpio_num].fun_ie;
*oe = (((gpio_num < 32) ? hw->enable.val : hw->enable1.val) & bit_mask) >> bit_shift;
*od = hw->pin[gpio_num].pad_driver;
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*drv = IOMUX.gpio[gpio_num].fun_drv;
*fun_sel = IOMUX.gpio[gpio_num].mcu_sel;
*sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
*slp_sel = IOMUX.gpio[gpio_num].slp_sel;
}
/**