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Merge branch 'bugfix/enable_gpio_20_v4.3' into 'release/v4.3'

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gpio: Enable IO20 on ESP32 (backport v4.3)

See merge request espressif/esp-idf!15022
This commit is contained in:
Song Ruo Jing
2021-10-09 08:44:17 +00:00
parent 0e0e298322 68f8b999bb
commit 3bcc85d96d
2 changed files with 3 additions and 3 deletions
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4
components/soc/esp32/include/soc/soc_caps.h
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@@ -114,8 +114,8 @@
// set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to
// control pullup/down/capability, independent with RTC registers.
// 0~39 except from 20, 24, 28~31 are valid
#define SOC_GPIO_VALID_GPIO_MASK (0xFFFFFFFFFFULL & ~(0ULL | BIT20 | BIT24 | BIT28 | BIT29 | BIT30 | BIT31))
// 0~39 except from 24, 28~31 are valid
#define SOC_GPIO_VALID_GPIO_MASK (0xFFFFFFFFFFULL & ~(0ULL | BIT24 | BIT28 | BIT29 | BIT30 | BIT31))
// GPIO >= 34 are input only
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK (SOC_GPIO_VALID_GPIO_MASK & ~(0ULL | BIT34 | BIT35 | BIT36 | BIT37 | BIT38 | BIT39))