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Merge branch 'feature/support_auto_adjust_voltage_storingInEfuse_openGlitchRst' into 'master'
ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3 See merge request espressif/esp-idf!13395
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@@ -122,6 +122,15 @@ set sleep_init default param
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#define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1
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#define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 254
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/*
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The follow value is used to get a reasonable rtc voltage dbias value according to digital dbias & some other value
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storing in efuse (based on ATE 5k ECO3 chips)
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*/
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#define K_RTC_MID_MUL10000 215
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#define K_DIG_MID_MUL10000 213
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#define V_RTC_MID_MUL10000 10800
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#define V_DIG_MID_MUL10000 10860
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/**
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* @brief Possible main XTAL frequency values.
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*
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