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driver/i2s: refactor ll and hal

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This commit is contained in:
laokaiyao
2021-07-20 21:03:52 +08:00
parent d51b85989b
commit 3c57a6ac36
16 changed files with 1871 additions and 1407 deletions
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343
components/hal/esp32/include/hal/i2s_ll.h
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@@ -67,7 +67,7 @@ static inline void i2s_ll_enable_clock(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable tx msb right
*/
static inline void i2s_ll_tx_msb_right_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_enable_msb_right(i2s_dev_t *hw, bool enable)
{
hw->conf.tx_msb_right = enable;
}
@@ -78,7 +78,7 @@ static inline void i2s_ll_tx_msb_right_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable rx msb right
*/
static inline void i2s_ll_rx_msb_right_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_enable_msb_right(i2s_dev_t *hw, bool enable)
{
hw->conf.rx_msb_right = enable;
}
@@ -89,7 +89,7 @@ static inline void i2s_ll_rx_msb_right_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable send right channel first
*/
static inline void i2s_ll_tx_right_first_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_enable_right_first(i2s_dev_t *hw, bool enable)
{
hw->conf.tx_right_first = enable;
}
@@ -100,7 +100,7 @@ static inline void i2s_ll_tx_right_first_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable receive right channel first
*/
static inline void i2s_ll_rx_right_first_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_enable_right_first(i2s_dev_t *hw, bool enable)
{
hw->conf.rx_right_first = enable;
}
@@ -111,7 +111,7 @@ static inline void i2s_ll_rx_right_first_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable tx fifo module
*/
static inline void i2s_ll_tx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_force_enable_fifo_mod(i2s_dev_t *hw, bool enable)
{
hw->fifo_conf.tx_fifo_mod_force_en = enable;
}
@@ -122,7 +122,7 @@ static inline void i2s_ll_tx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable rx fifo module
*/
static inline void i2s_ll_rx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_force_enable_fifo_mod(i2s_dev_t *hw, bool enable)
{
hw->fifo_conf.rx_fifo_mod_force_en = enable;
}
@@ -132,7 +132,7 @@ static inline void i2s_ll_rx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param slave_en Set true to enable slave mode
*/
static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, bool slave_en)
static inline void i2s_ll_tx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
{
hw->conf.tx_slave_mod = slave_en;
}
@@ -143,7 +143,7 @@ static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, bool slave_en)
* @param hw Peripheral I2S hardware instance address.
* @param slave_en Set true to enable slave mode
*/
static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, bool slave_en)
static inline void i2s_ll_rx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
{
hw->conf.rx_slave_mod = slave_en;
}
@@ -153,7 +153,7 @@ static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, bool slave_en)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset(i2s_dev_t *hw)
{
hw->conf.tx_reset = 1;
hw->conf.tx_reset = 0;
@@ -164,7 +164,7 @@ static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset(i2s_dev_t *hw)
{
hw->conf.rx_reset = 1;
hw->conf.rx_reset = 0;
@@ -175,7 +175,7 @@ static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_tx_fifo(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset_fifo(i2s_dev_t *hw)
{
hw->conf.tx_fifo_reset = 1;
hw->conf.tx_fifo_reset = 0;
@@ -186,7 +186,7 @@ static inline void i2s_ll_reset_tx_fifo(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw)
{
hw->conf.rx_fifo_reset = 1;
hw->conf.rx_fifo_reset = 0;
@@ -198,7 +198,7 @@ static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock
*/
static inline void i2s_ll_set_tx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
//0: disable APLL clock, I2S module will using PLL_D2_CLK(160M) as source clock
//1: Enable APLL clock, I2S module will using APLL as source clock
@@ -211,7 +211,7 @@ static inline void i2s_ll_set_tx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock
*/
static inline void i2s_ll_set_rx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
//0: disable APLL clock, I2S module will using PLL_D2_CLK(160M) as source clock
//1: Enable APLL clock, I2S module will using APLL as source clock
@@ -224,7 +224,7 @@ static inline void i2s_ll_set_rx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
* @param hw Peripheral I2S hardware instance address.
* @param set Pointer to I2S clock devider configuration paramater
*/
static inline void i2s_ll_set_tx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
static inline void i2s_ll_tx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
{
hw->clkm_conf.clkm_div_num = set->mclk_div;
hw->clkm_conf.clkm_div_b = set->b;
@@ -238,7 +238,7 @@ static inline void i2s_ll_set_tx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
* @param hw Peripheral I2S hardware instance address.
* @param set Pointer to I2S clock devider configuration paramater
*/
static inline void i2s_ll_set_rx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
static inline void i2s_ll_rx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
{
hw->clkm_conf.clkm_div_num = set->mclk_div;
hw->clkm_conf.clkm_div_b = set->b;
@@ -251,7 +251,7 @@ static inline void i2s_ll_set_rx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_enable_tx_intr(i2s_dev_t *hw)
static inline void i2s_ll_tx_enable_intr(i2s_dev_t *hw)
{
hw->int_ena.out_eof = 1;
hw->int_ena.out_dscr_err = 1;
@@ -262,7 +262,7 @@ static inline void i2s_ll_enable_tx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
static inline void i2s_ll_tx_disable_intr(i2s_dev_t *hw)
{
hw->int_ena.out_eof = 0;
hw->int_ena.out_dscr_err = 0;
@@ -273,7 +273,7 @@ static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
static inline void i2s_ll_rx_enable_intr(i2s_dev_t *hw)
{
hw->int_ena.in_suc_eof = 1;
hw->int_ena.in_dscr_err = 1;
@@ -284,7 +284,7 @@ static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
static inline void i2s_ll_rx_disable_intr(i2s_dev_t *hw)
{
hw->int_ena.in_suc_eof = 0;
hw->int_ena.in_dscr_err = 0;
@@ -294,11 +294,12 @@ static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
* @brief Get I2S interrupt status
*
* @param hw Peripheral I2S hardware instance address.
* @param int_stat Pointer to module interrupt status
* @return
* - module interrupt status
*/
static inline void i2s_ll_get_intr_status(i2s_dev_t *hw, uint32_t *int_stat)
static inline uint32_t i2s_ll_get_intr_status(i2s_dev_t *hw)
{
*int_stat = hw->int_st.val;
return hw->int_st.val;
}
/**
@@ -317,7 +318,7 @@ static inline void i2s_ll_clear_intr_status(i2s_dev_t *hw, uint32_t clr_mask)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_dma_out(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset_dma(i2s_dev_t *hw)
{
hw->lc_conf.out_rst = 1;
hw->lc_conf.out_rst = 0;
@@ -328,7 +329,7 @@ static inline void i2s_ll_reset_dma_out(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_dma_in(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset_dma(i2s_dev_t *hw)
{
hw->lc_conf.in_rst = 1;
hw->lc_conf.in_rst = 0;
@@ -339,7 +340,7 @@ static inline void i2s_ll_reset_dma_in(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_start_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_start(i2s_dev_t *hw)
{
hw->conf.tx_start = 1;
}
@@ -349,7 +350,7 @@ static inline void i2s_ll_start_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_start_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_start(i2s_dev_t *hw)
{
hw->conf.rx_start = 1;
}
@@ -360,7 +361,7 @@ static inline void i2s_ll_start_rx(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param link_addr DMA descriptor link address.
*/
static inline void i2s_ll_start_tx_link(i2s_dev_t *hw, uint32_t link_addr)
static inline void i2s_ll_tx_start_link(i2s_dev_t *hw, uint32_t link_addr)
{
hw->out_link.addr = link_addr;
hw->out_link.start = 1;
@@ -372,7 +373,7 @@ static inline void i2s_ll_start_tx_link(i2s_dev_t *hw, uint32_t link_addr)
* @param hw Peripheral I2S hardware instance address.
* @param link_addr DMA descriptor link address.
*/
static inline void i2s_ll_start_rx_link(i2s_dev_t *hw, uint32_t link_addr)
static inline void i2s_ll_rx_start_link(i2s_dev_t *hw, uint32_t link_addr)
{
hw->in_link.addr = link_addr;
hw->in_link.start = 1;
@@ -383,7 +384,7 @@ static inline void i2s_ll_start_rx_link(i2s_dev_t *hw, uint32_t link_addr)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_stop(i2s_dev_t *hw)
{
hw->conf.tx_start = 0;
}
@@ -393,7 +394,7 @@ static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_stop(i2s_dev_t *hw)
{
hw->conf.rx_start = 0;
}
@@ -403,7 +404,7 @@ static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_out_link(i2s_dev_t *hw)
static inline void i2s_ll_tx_stop_link(i2s_dev_t *hw)
{
hw->out_link.stop = 1;
}
@@ -413,7 +414,7 @@ static inline void i2s_ll_stop_out_link(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_in_link(i2s_dev_t *hw)
static inline void i2s_ll_rx_stop_link(i2s_dev_t *hw)
{
hw->in_link.stop = 1;
}
@@ -424,7 +425,7 @@ static inline void i2s_ll_stop_in_link(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param eof_addr Pointer to accept out eof des address
*/
static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
static inline void i2s_ll_tx_get_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
{
*eof_addr = hw->out_eof_des_addr;
}
@@ -435,7 +436,7 @@ static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr
* @param hw Peripheral I2S hardware instance address.
* @param eof_addr Pointer to accept in eof des address
*/
static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
static inline void i2s_ll_rx_get_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
{
*eof_addr = hw->in_eof_des_addr;
}
@@ -446,7 +447,7 @@ static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
* @param hw Peripheral I2S hardware instance address.
* @param eof_num the byte length to trigger in_suc_eof interrupt
*/
static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, int eof_num)
static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, int eof_num)
{
// On ESP32, the eof_num count in words.
hw->rx_eof_num = eof_num / 4;
@@ -456,12 +457,12 @@ static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, int eof_num)
* @brief Congfigure TX chan bit and audio data bit, on ESP32, sample_bit should equals to data_bit
*
* @param hw Peripheral I2S hardware instance address.
* @param sample_bit The chan bit width
* @param chan_bit The chan bit width
* @param data_bit The audio data bit width
*/
static inline void i2s_ll_set_tx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
{
hw->fifo_conf.tx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->fifo_conf.tx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->sample_rate_conf.tx_bits_mod = data_bit;
}
@@ -469,12 +470,12 @@ static inline void i2s_ll_set_tx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, i
* @brief Congfigure RX chan bit and audio data bit, on ESP32, sample_bit should equals to data_bit
*
* @param hw Peripheral I2S hardware instance address.
* @param sample_bit The chan bit width
* @param chan_bit The chan bit width
* @param data_bit The audio data bit width
*/
static inline void i2s_ll_set_rx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
static inline void i2s_ll_rx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
{
hw->fifo_conf.rx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->fifo_conf.rx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->sample_rate_conf.rx_bits_mod = data_bit;
}
@@ -484,97 +485,53 @@ static inline void i2s_ll_set_rx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, i
* @param hw Peripheral I2S hardware instance address.
* @param ena Set true to enable DMA
*/
static inline void i2s_ll_dma_enable(i2s_dev_t *hw, bool ena)
static inline void i2s_ll_enable_dma(i2s_dev_t *hw, bool ena)
{
hw->fifo_conf.dscr_en = ena;
}
/**
* @brief Set I2S TX to philip standard
* @brief Configure TX WS signal width
*
* @param hw Peripheral I2S hardware instance address.
* @param width WS width in BCK cycle
*/
static inline void i2s_ll_set_tx_format_philip(i2s_dev_t *hw)
static inline void i2s_ll_tx_set_ws_width(i2s_dev_t *hw, int width)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 1;
hw->conf.tx_short_sync = width == 1 ? 1 : 0;
}
/**
* @brief Set I2S RX to philip standard
* @brief Configure RX WS signal width
*
* @param hw Peripheral I2S hardware instance address.
* @param width WS width in BCK cycle
*/
static inline void i2s_ll_set_rx_format_philip(i2s_dev_t *hw)
static inline void i2s_ll_rx_set_ws_width(i2s_dev_t *hw, int width)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 1;
hw->conf.rx_short_sync = width == 1 ? 1 : 0;
}
/**
* @brief Set I2S TX to MSB Alignment Standard
* @brief Enable TX MSB shift, the data will be launch at the first BCK clock
*
* @param hw Peripheral I2S hardware instance address.
* @param msb_shift_enable Set true to enable MSB shift
*/
static inline void i2s_ll_set_tx_format_msb_align(i2s_dev_t *hw)
static inline void i2s_ll_tx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 0;
hw->conf.tx_msb_shift = msb_shift_enable;
}
/**
* @brief Set I2S RX to MSB Alignment Standard
* @brief Enable RX MSB shift, the data will be launch at the first BCK clock
*
* @param hw Peripheral I2S hardware instance address.
* @param msb_shift_enable Set true to enable MSB shift
*/
static inline void i2s_ll_set_rx_format_msb_align(i2s_dev_t *hw)
static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 0;
}
/**
* @brief Set I2S TX to PCM short standard
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_pcm_short(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 1;
hw->conf.tx_msb_shift = 0;
}
/**
* @brief Set I2S RX to PCM short standard
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_pcm_short(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 1;
hw->conf.rx_msb_shift = 0;
}
/**
* @brief Set I2S TX to PCM long standard
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_pcm_long(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 0;
}
/**
* @brief Set I2S RX to PCM long standard
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_pcm_long(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 0;
hw->conf.rx_msb_shift = msb_shift_enable;
}
/**
@@ -583,14 +540,10 @@ static inline void i2s_ll_set_rx_pcm_long(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param mono_ena Set true to enable mono mde.
*/
static inline void i2s_ll_tx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
static inline void i2s_ll_tx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
{
int data_bit = hw->sample_rate_conf.tx_bits_mod;
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
hw->fifo_conf.tx_fifo_mod = 0 + mono_ena;
} else {
hw->fifo_conf.tx_fifo_mod = 2 + mono_ena;
}
hw->fifo_conf.tx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena;
hw->conf_chan.tx_chan_mod = mono_ena;
}
@@ -600,14 +553,10 @@ static inline void i2s_ll_tx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
* @param hw Peripheral I2S hardware instance address.
* @param mono_ena Set true to enable mono mde.
*/
static inline void i2s_ll_rx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
static inline void i2s_ll_rx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
{
int data_bit = hw->sample_rate_conf.rx_bits_mod;
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
hw->fifo_conf.rx_fifo_mod = 0 + mono_ena;
} else {
hw->fifo_conf.rx_fifo_mod = 2 + mono_ena;
}
hw->fifo_conf.rx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena;
hw->conf_chan.rx_chan_mod = mono_ena;
}
@@ -617,30 +566,21 @@ static inline void i2s_ll_rx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
* @param hw Peripheral I2S hardware instance address.
* @param loopback_en Set true to enable loopback mode.
*/
static inline void i2s_ll_loop_back_ena(i2s_dev_t *hw, bool loopback_en)
static inline void i2s_ll_enable_loop_back(i2s_dev_t *hw, bool loopback_en)
{
hw->conf.sig_loopback = loopback_en;
}
/**
* @brief Set default RX PDM mode
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_rx_pdm_cfg(i2s_dev_t *hw)
{
hw->pdm_conf.rx_sinc_dsr_16_en = 0;
hw->pdm_conf.pdm2pcm_conv_en = 1;
hw->pdm_conf.rx_pdm_en = 1;
}
/******************************I2S PDM Configurations*************************************/
/**
* @brief Configure RX PDM downsample
*
* @param hw Peripheral I2S hardware instance address.
* @param dsr PDM downsample configuration paramater
*/
static inline void i2s_ll_set_pdm_rx_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t dsr)
static inline void i2s_ll_rx_set_pdm_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t dsr)
{
hw->pdm_conf.rx_sinc_dsr_16_en = dsr;
}
@@ -651,44 +591,88 @@ static inline void i2s_ll_set_pdm_rx_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t dsr)
* @param hw Peripheral I2S hardware instance address.
* @param dsr Pointer to accept PDM downsample configuration
*/
static inline void i2s_ll_get_pdm_rx_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t *dsr)
static inline void i2s_ll_rx_get_pdm_dsr(i2s_dev_t *hw, i2s_pdm_dsr_t *dsr)
{
*dsr = hw->pdm_conf.rx_sinc_dsr_16_en;
}
/**
* @brief Enable I2S TX PDM mode
*
* @param hw Peripheral I2S hardware instance address.
* @param pdm_ena Set true to enable TX PDM mode
*/
static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pdm_ena)
{
hw->pdm_conf.tx_pdm_en = pdm_ena;
hw->pdm_conf.pcm2pdm_conv_en = pdm_ena;
}
/**
* @brief Enable I2S RX PDM mode
*
* @param hw Peripheral I2S hardware instance address.
* @param pdm_ena Set true to enable RX PDM mode
*/
static inline void i2s_ll_set_rx_pdm_en(i2s_dev_t *hw, bool pdm_ena)
static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_ena)
{
hw->pdm_conf.rx_pdm_en = pdm_ena;
hw->pdm_conf.pdm2pcm_conv_en = pdm_ena;
}
/**
* @brief Configure I2S TX pdm
* @brief Set I2S TX PDM prescale
*
* @param hw Peripheral I2S hardware instance address.
* @param sample_rate The sample rate to be set.
* @param prescale I2S TX PDM prescale
*/
static inline void i2s_ll_tx_pdm_cfg(i2s_dev_t *hw, uint32_t sample_rate)
static inline void i2s_ll_tx_set_pdm_prescale(i2s_dev_t *hw, bool prescale)
{
uint32_t fp = 960;
uint32_t fs = sample_rate / 100;
typeof(hw->pdm_conf) pdm_conf_reg = hw->pdm_conf;
pdm_conf_reg.tx_sinc_osr2 = fp / fs;
pdm_conf_reg.tx_prescale = 0;
pdm_conf_reg.tx_hp_in_shift = 1;
pdm_conf_reg.tx_lp_in_shift = 1;
pdm_conf_reg.tx_sinc_in_shift = 1;
pdm_conf_reg.tx_sigmadelta_in_shift = 1;
pdm_conf_reg.pcm2pdm_conv_en = 1;
pdm_conf_reg.tx_pdm_en = 1;
hw->pdm_conf.val = pdm_conf_reg.val;
hw->pdm_freq_conf.tx_pdm_fp = fp;
hw->pdm_freq_conf.tx_pdm_fs = fs;
hw->pdm_conf.tx_prescale = prescale;
}
/**
* @brief Set I2S TX PDM high pass filter scaling
*
* @param hw Peripheral I2S hardware instance address.
* @param sig_scale I2S TX PDM signal scaling before transmit to the filter
*/
static inline void i2s_ll_tx_set_pdm_hp_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
{
hw->pdm_conf.tx_hp_in_shift = sig_scale;
}
/**
* @brief Set I2S TX PDM low pass filter scaling
*
* @param hw Peripheral I2S hardware instance address.
* @param sig_scale I2S TX PDM signal scaling before transmit to the filter
*/
static inline void i2s_ll_tx_set_pdm_lp_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
{
hw->pdm_conf.tx_lp_in_shift = sig_scale;
}
/**
* @brief Set I2S TX PDM sinc filter scaling
*
* @param hw Peripheral I2S hardware instance address.
* @param sig_scale I2S TX PDM signal scaling before transmit to the filter
*/
static inline void i2s_ll_tx_set_pdm_sinc_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
{
hw->pdm_conf.tx_sinc_in_shift = sig_scale;
}
/**
* @brief Set I2S TX PDM sigma-delta filter scaling
*
* @param hw Peripheral I2S hardware instance address.
* @param sig_scale I2S TX PDM signal scaling before transmit to the filter
*/
static inline void i2s_ll_tx_set_pdm_sd_scale(i2s_dev_t *hw, i2s_pdm_sig_scale_t sig_scale)
{
hw->pdm_conf.tx_sigmadelta_in_shift = sig_scale;
}
/**
@@ -699,7 +683,7 @@ static inline void i2s_ll_tx_pdm_cfg(i2s_dev_t *hw, uint32_t sample_rate)
* @param fp The fp value of TX PDM filter module group0.
* @param fs The fs value of TX PDM filter module group0.
*/
static inline void i2s_ll_set_tx_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t fs)
static inline void i2s_ll_tx_set_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t fs)
{
hw->pdm_freq_conf.tx_pdm_fp = fp;
hw->pdm_freq_conf.tx_pdm_fs = fs;
@@ -707,56 +691,85 @@ static inline void i2s_ll_set_tx_pdm_fpfs(i2s_dev_t *hw, uint32_t fp, uint32_t f
}
/**
* @brief Get I2S TX PDM configuration
* @brief Get I2S TX PDM fp configuration paramater
*
* @param hw Peripheral I2S hardware instance address.
* @param fp Pointer to accept TX PDM fp configuration paramater
* @param fs Pointer to accept TX PDM fs configuration paramater
* @return
* - fp configuration paramater
*/
static inline void i2s_ll_get_tx_pdm_fpfs(i2s_dev_t *hw, uint32_t *fp, uint32_t *fs)
static inline uint32_t i2s_ll_tx_get_pdm_fp(i2s_dev_t *hw)
{
*fp = hw->pdm_freq_conf.tx_pdm_fp;
*fs = hw->pdm_freq_conf.tx_pdm_fs;
return hw->pdm_freq_conf.tx_pdm_fp;
}
/**
* @brief Enable I2S TX PDM mode
* @brief Get I2S TX PDM fs configuration paramater
*
* @param hw Peripheral I2S hardware instance address.
* @param pdm_ena Set true to enable TX PDM mode
* @return
* - fs configuration paramater
*/
static inline void i2s_ll_set_tx_pdm_en(i2s_dev_t *hw, bool pdm_ena)
static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw)
{
hw->pdm_conf.tx_pdm_en = pdm_ena;
return hw->pdm_freq_conf.tx_pdm_fs;
}
/****************************I2S ADC/DAC Configurations***********************************/
/**
* @brief Enable I2S LCD mode
* @note Have to enable LCD mode to use build in ADC/DAC
*
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable LCD mode.
*/
static inline void i2s_ll_enable_lcd(i2s_dev_t *hw, bool enable)
{
hw->conf2.lcd_en = enable;
}
/**
* @brief Enable I2S camera mode
*
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable camera mode.
*/
static inline void i2s_ll_enable_camera(i2s_dev_t *hw, bool enable)
{
hw->conf2.camera_en = enable;
}
/**
* @brief Enable I2S build in ADC mode
*
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable build in ADC
*/
static inline void i2s_ll_build_in_adc_ena(i2s_dev_t *hw)
static inline void i2s_ll_enable_builtin_adc(i2s_dev_t *hw, bool enable)
{
hw->conf2.lcd_en = 1;
hw->conf2.lcd_en = enable;
hw->conf2.camera_en = 0;
hw->conf.rx_right_first = 0;
hw->conf.rx_msb_shift = 0;
hw->conf.rx_mono = 0;
hw->conf.rx_short_sync = 0;
hw->fifo_conf.rx_fifo_mod = 1;
hw->conf_chan.rx_chan_mod = 1;
hw->fifo_conf.rx_fifo_mod = enable;
hw->conf_chan.rx_chan_mod = enable;
}
/**
* @brief Enable I2S build in DAC mode
*
* @param hw Peripheral I2S hardware instance address.
* * @param enable Set true to enable build in DAC
*/
static inline void i2s_ll_build_in_dac_ena(i2s_dev_t *hw)
static inline void i2s_ll_enable_builtin_dac(i2s_dev_t *hw, bool enable)
{
hw->conf2.lcd_en = 1;
hw->conf2.lcd_en = enable;
hw->conf2.camera_en = 0;
hw->conf.tx_right_first = 1;
hw->conf.tx_right_first = enable;
hw->conf.tx_msb_shift = 0;
hw->conf.tx_short_sync = 0;
}